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MAX4331 Datasheet(PDF) 10 Page - Maxim Integrated Products

Part # MAX4331
Description  Single/Dual/Quad, Low-Power, Single-Supply, Rail-to-Rail I/O Op Amps with Shutdown
PDF  16 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX4331 Datasheet(HTML) 10 Page - Maxim Integrated Products

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Single/Dual/Quad, Low-Power, Single-Supply,
Rail-to-Rail I/O Op Amps with Shutdown
10
______________________________________________________________________________________
_______________Detailed Description
Rail-to-Rail Input Stage
The MAX4330–MAX4334 have rail-to-rail input and out-
put stages that are specifically designed for low-
voltage, single-supply operation. The input stage con-
sists of separate NPN and PNP differential stages,
which operate together to provide a common-mode
range extending to 0.25V beyond both supply rails. The
crossover region, which occurs halfway between VCC
and VEE, is extended to minimize degradation in CMRR
caused by mismatched input pairs. The input offset volt-
age is typically 250µV. Low offset voltage, high band-
width, rail-to-rail common-mode input range, and
rail-to-rail outputs make this family of op amps an excel-
lent choice for precision, low-voltage data-acquisition
systems.
Since the input stage consists of NPN and PNP pairs,
the input bias current changes polarity as the input volt-
age passes through the crossover region. Match the
effective impedance seen by each input to reduce the
offset error due to input bias currents flowing through
external source impedances (Figures 1a and 1b). The
combination of high source impedance with input
capacitance (amplifier input capacitance plus stray
capacitance) creates a parasitic pole that produces an
underdamped signal response. Reducing input capaci-
tance or placing a small capacitor across the feedback
resistor improves response.
The MAX4330–MAX4334’s inputs are protected from
large differential input voltages by internal 1k
Ω series
resistors and back-to-back triple diode stacks across
the inputs (Figure 2). For differential input voltages
(much less than 1.8V), input resistance is typically
2.3M
Ω. For differential input voltages greater than 1.8V,
input resistance is around 2k
Ω, and the input bias cur-
rent can be approximated by the following equation:
IBIAS = (VDIFF - 1.8V) / 2k
Ω
In the region where the differential input voltage
approaches 1.8V, input resistance decreases exponen-
tially from 2.3M
Ω to 2kΩ as the diode block begins con-
ducting. Inversely, the bias current increases with the
same curve.
R3
R3 = R1
R2
R1
R2
MAX4330
MAX4331
MAX4332
MAX4333
MAX4334
Figure 1a. Reducing Offset Error Due to Bias Current
(Noninverting)
R3
R3 = R1
R2
R1
R2
MAX4330
MAX4331
MAX4332
MAX4333
MAX4334
Figure 1b. Reducing Offset Error Due to Bias Current
(Inverting)



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