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FT232H Datasheet(PDF) 29 Page - Future Technology Devices International Ltd. |
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FT232H Datasheet(HTML) 29 Page - Future Technology Devices International Ltd. |
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29 / 65 page ![]() Copyright © 2014 Future Technology Devices International Limited 29 Document No.: FT_000288 FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 1.81 Clearance No.: FTDI #199 4.5 FT245 Style Asynchronous FIFO Interface Mode Description The FT232H can be configured as an asynchronous FIFO interface. This mode is similar to the synchronous FIFO interface with the exception that the data is written to or read from the FIFO on the falling edge of the WR# or RD# signals. This mode does not provide a CLKOUT signal and it does not expect an OE# input signal. The following diagrams illustrate the asynchronous FIFO mode timing. Figure 4.5 FT245 Asynchronous FIFO Interface READ Signal Waveforms Figure 4.6 FT245 Asynchronous FIFO Interface WRITE Signal Waveforms Time Description Min Max Units T1 RD# inactive to RXF# 1 14 ns T2 RXF# inactive after RD# cycle 49 ns T3 RD# to DATA 1 14 ns T4 RD# active pulse width 30 ns T5 RD# active after RXF# 0 ns T6 WR# active to TXE# inactive 1 14 ns T7 TXE# active to TXE# after WR# cycle 49 ns T8 DATA to WR# active setup time 5 ns T9 DATA hold time after WR# inactive 5 ns T10 WR# active pulse width 30 ns T11 WR# active after TXE# 0 ns Table 4.2 Asynchronous FIFO Timings (based on standard drive level outputs) |
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