FT232H datasheet(37/65 Pages) FTDI

37 / 65 page

Document No.: FT_000288

FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC

Datasheet Version 1.81

Clearance No.: FTDI #199

MPSSE mode is enabled using the FT_SetBitMode D2xx driver command with a hex value of 0x02. A hex

value of 0x00 will reset the device. See application note AN135 – MPSSE Basics for more details and

examples.

The MPSSE command set is fully described in application note AN108 – Command Processor For

MPSSE and MCU Host Bus Emulation Modes

4.8.1

MPSSE Adaptive Clocking

The Adaptive Clock mode correlates the CLK signal with a return clock RTCK. This is a technique used by

ARM® processors.

The FT232H will assert the TCK line and wait for the RTCK to be returned from the target device to

GPIOL3 line before changing the TDO (data out line).

FT2232H

ARM CPU

RTCK

TCK

TDO

GPIOL3

Figure 4.15 Adaptive Clocking Interconnect

TDO

TCK

RTCK

TDO changes on falling

edge of TCK

Figure 4.16: Adaptive Clocking waveform.

Adaptive clocking is not enabled by default.

For further details on MPSSE adaptive clocking please refer to AN_108

Command Processor For

MPSSE and MCU Host Bus Emulation Modes

FT232H Datasheet(PDF) 37 Page - Future Technology Devices International Ltd.