FT900 datasheet(29/58 Pages) FTDI

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FT900/1/2/3 Embedded Microcontroller Datasheet

Version 1.0

Document No.: FT_000965 Clearance No.: FTDI#421

4.10.1 Features:



Conforms to protocol version 2.0 parts A and B.



Supports bit rates of up to 1 Mbit/s.



Supports standard (11-bit identifier) and extended (29-bit identifier) frames.



Support hardware message filtering with dual/single filters.



64 Bytes receiver and 16 Bytes transmitter FIFO.



No overload frames are generated.



Supports normal and listen-only modes.



Supports single shot transmission.



Supports an abort transmission feature.



Readable error counters and last error code capture supported.

4.11 Real Time Clock

The Real Time Clock (RTC) is a set of counters for measuring time when system power is on,

and the internal regulator will provide power to the RTC. It is clocked by a 32.768 kHz

oscillator.

4.11.1 Features:



No need external battery power supply.



Alarm interrupt can be generated for a specific data/time setting.



Hardware reset does not interrupt the RTC counter.

4.12 One-Wire Debugger Interface

The Debugger interface provides the capability, over a One-Wire half duplex serial link, to

access memory mapped address space, such as the FT900 Flash memory, program memory,

data memory and I/O memory. However, there is no transfer capability from any of the

internal memory to the debugger interface.

4.12.1 Features:



Single wire half duplex link that has one Start, eight Data and one Stop bits at a 1M

bit/s rate.



Supports debugger command read / write operation with variable data transfer.



Supports CHIP ID read out.



Supports checksum check by Flash memory operation.



Supports CPU software debugging to execute Run, Stop, Step, Halt, Set software

breakpoint, etc. operations.



Use semaphore flag to control resource allocated by CPU or Debugger.

4.13 SPI Interface

The FT900 series contains an SPI master and SPI0, SPI1 slave controllers. SPI is a full duplex

serial interface designed to handle multiple masters and slaves connected to a given bus.

4.13.1 Features:



Maximum SPI data bit rate 25MHz in master and slave modes.



Full duplex synchronous serial data transfer.



Compliant with SPI specification, support four transfer formats.



SPI master supports Single, Dual and Quad SPI transfer.



SPI0, SPI1 slave support Single transfer only.

FT900 Datasheet(PDF) 29 Page - Future Technology Devices International Ltd.

FT900 Datasheet(HTML) 29 Page - Future Technology Devices International Ltd.

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