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FT900/1/2/3 Embedded Microcontroller Datasheet

Version 1.0

Document No.: FT_000965 Clearance No.: FTDI#421

pixel clock (PCLK) cycle. The PCLK signal indicates a valid data byte over the data lines and it

is used as a transfer trigger.

4.18.1 Features:



Configure camera registers via I2C two-wire interface.



8-bit data is clocked by an external clock provided by the camera module.



With VSYNC, HREF and PCLK control signals.



Programmable data capture trigger position.



2kB FIFO for camera capture data.

4.19 PWM

The FT900 series supports 7 separate independent PWM output channels. All channels share an

8-bit pre-scaler to scale the system clock frequency to the desired channels.

Each channel has its own 16-bit comparator value. This is the value that would be matched to

a preset 16-bit counter. When a channel’s 16-bit comparator value matches that of the 16-bit

counter, the corresponding PWM channel output will toggle. This 16-bit comparator value will

continue to count until it reaches its preset value, and the counter will just roll over.

A special feature allows the 7 channels each to also toggle its own output based on the

comparison results of other channels. Hence each channel potentially can have up to 8 toggle

edges. The PWM signal generated can be output as a single-shot or continuous output.

The PWM counter also supports an external trigger. There are 6 GPIOs selectable for an

external trigger.

PWM channel 0 and channel 1 can double as a stereo 11 KHz or 22 KHz PCM audio channel.

Once this feature is setup, the 16-bit or 8-bit PCM audio data can be downloaded to the PWM

local FIFO which can hold up to 64 bytes stereo or 128 bytes mono audio data. The data will

be playback based on the pre-scaler and 16-bit counter, and the data will be automatically

scaled to fit in the playback period if necessary.

4.19.1 Features:



Support 7 PWM output channels.



Support single-shot or continuous PWM data output.



Support external GPIO trigger.



Support 16-bit / 8-bit stereo PCM audio data output.



Control PCM FIFO full, empty, half-empty, overflow and underflow buffer management.



Support PCM volume control for audio playback.

4.20 SD host controller

The FT900 series contains one SD host controller offering access to external large capacity

non-volatile memory.

4.20.1 Features:



Compliant with SD host controller standard specification, version 3.0.



Supports both streaming and non-streaming data transfers.



Compliant with SD physical layer specification, version 3.0.



Supports UHS50/UHS104 card.



Supports configurable SD bus modes: 4-bit mode and 8-bit mode.



Compliant with SDIO card specification, version 2.0.



Compliant with MMC card specification, version 4.3.



Supports configurable 1K/2K/4K SRAM for data FIFO.



Supports configurable 1-bit/4-bit SD card bus and 1-bit/4-bit/8-bit MMC card bus.

FT900 Datasheet(PDF) 32 Page - Future Technology Devices International Ltd.

FT900 Datasheet(HTML) 32 Page - Future Technology Devices International Ltd.

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