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FT900 Datasheet(PDF) 33 Page - Future Technology Devices International Ltd. |
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FT900 Datasheet(HTML) 33 Page - Future Technology Devices International Ltd. |
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33 / 58 page ![]() Copyright © 2014 Future Technology Devices International Limited 33 FT900/1/2/3 Embedded Microcontroller Datasheet Version 1.0 Document No.: FT_000965 Clearance No.: FTDI#421 Configurable CPRM function for security. Built-in generation and check for 7-bit and 16-bit CRC data. Card detection (Insertion/Removal). Supports read wait mechanism for SDIO function. Supports suspend/resume mechanism for SDIO function. 4.21 Analog to Digital Converter (ADC) The FT900 series has a low-power, high-speed, successive approximation Analog-to-Digital Converter (ADC) that supports a 10-bit resolution and superior maximum sampling frequencies of up to 1 Mega Samples Per-second (MSPS). This ADC accepts analog inputs ranging from the ground supplies to the power supplies. This ADC can be used in various low-power and medium-resolution applications. 4.21.1 Features: 10-bit successive approximation ADC. Supports 7 channel input. Individual channels can be selected for conversion. Power-down mode support. Max conversion rate up to 1MSPS. Measurement range 0 to VCC3V3A, by default the range voltage is 10% off of VCC3V3A. See Table 5-7. INL: 0.56/-1.05 LSB (Typ.). DNL: 0.66/-0.58 LSB (Typ.). 4.22 Digital to Analog Converter (DAC) The FT900 series has two 10-bit, 1 Mega Samples Per-second (MSPS) Digital-Analog converter (DAC). It includes digital logic for registering the DAC value and a unity-gain buffer capable of driving off-chip. The module can also be switched to a power-down state where it consumes a minimum amount of current. The maximum output value of the DAC is DAC_REFP. 4.22.1 Features: Two 10-bit DACs (0/1). 10-bit R-2R DAC ladder structure. Buffered output. Power-down mode support. Programmable conversion rate, the maximum rate is 1MHz. Selectable output drive. 4.23 General Purpose Input Output The FT900 series provides up to 65 configurable Input / Output pins controlled by GPIO registers. All pins have multiple functions with special peripheral connection. Separate registers allow setting or clearing any number of outputs simultaneously. All GPIO pins default to inputs with pull-down resistors enable on reset except GPIO0/1/2 inputs that have pull-up resistors enabled. All GPIOs can function as an interrupt. The polarity can be either positive edge or negative edge if its interrupt capability is enabled. In this case, the GPIO pin must be configured as a GPIO input. |
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