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S1011 Datasheet(PDF) 12 Page - Seiko Instruments Inc

Part # S1011
Description  BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR
PDF  43 Pages
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Manufacturer  SII [Seiko Instruments Inc]
Direct Link  http://www.sii.co.jp
Logo SII - Seiko Instruments Inc

S1011 Datasheet(HTML) 12 Page - Seiko Instruments Inc

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HIGH-WITHSTAND VOLTAGE BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR
S-1011 Series
Rev.1.2_00
Seiko Instruments Inc.
12
2. 2 S-1011 Series E / G type
Table 18
(Ta =
+25°C unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
Detection voltage
*1
−VDET
VDD = 16.0 V, 5.0 V
≤ −VDET(S) ≤ 10.0 V
−VDET(S)
× 0.985
−VDET(S)
−VDET(S)
× 1.015
V
1
Hysteresis width
VHYS
VDD = 16.0 V
E type
−VDET
× 0.030
−VDET
× 0.050
−VDET
× 0.080
V
1
G type
*2
−
0
−
V
1
Current
consumption
*3
ISS
VDD = 16.0 V, VSENSE =
−VDET − 0.1 V,
5.0 V
≤ −VDET ≤ 10.0 V
−
0.55
1.55
μA2
Operation voltage
VDD
−
3.0
−
36.0
V
1
Output current
IOUT
Output transistor
Nch
VDS
*4 = 0.05 V
VDD = 5.0 V, VSENSE = 4.5 V
0.5
−
−
mA
3
Leakage current
ILEAK
Output transistor
Nch
VDD = 30.0 V, VOUT = 30.0 V,
VSENSE = 30.0 V
−
−
2.0
μA3
Detection delay time
*5
tRESET
CN = 3.3 nF
8.0
10.0
12.0
ms
4
Release delay time
*6
tDELAY
CP = 3.3 nF
8.0
10.0
12.0
ms
4
SENSE pin resistance RSENSE
−
26.0
−
400
M
Ω
2
CP pin discharge
ON resistance
RCP
VDD = 4.5 V, VSENSE = 14.0 V, VCP = 0.5 V
0.30
−
2.60
k
Ω
−
CN pin discharge
ON resistance
RCN
VDD = 4.5 V, VSENSE = 4.5 V, VCN = 0.5 V
0.63
−
2.60
k
Ω
−
*1.
−VDET: Actual detection voltage value, −VDET(S): Set detection voltage value
*2.
Hysteresis width is "unavailable", so release voltage = detection voltage.
*3.
The current flowing through the SENSE pin resistance is not included.
*4.
VDS: Drain-to-source voltage of the output transistor
*5.
The time period from when the pulse voltage of
−VDET(S) + 1.0 V → −VDET(S) − 1.0 V is applied to the SENSE pin to
when VOUT reaches VDD / 2, after voltage of 16.0 V is applied to the VDD pin and the SENSE pin input voltage (VSENSE)
reaches the release voltage once.
*6.
The time period from when voltage of 16.0 V is applied to the VDD pin and the pulse voltage of
−VDET(S) − 1.0 V →
−VDET(S) + 1.0 V is applied to the SENSE pin to when VOUT reaches VDD / 2.



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