+48V, Single-Port Network Power Switch

For Power-Over-LAN

16

______________________________________________________________________________________

100V/ms (max) and the output-current slew rate out of

The MAX5922 has an integrated 0.45

Ω N-channel

power MOSFET. The MOSFET’s drain is connected to

the DRAIN pin and its source is connected to the OUT

pin. The MAX5922 monitors and provides current-limit

protection to the load at all times. The current limit is

programmable using an external current-sensing resis-

tor connected from IN to DRAIN. To be compatible with

the IEE802.3af standard, use a 0.5

Ω±1%, 50ppm/°C

resistor. The MAX5922 features current-limit foldback

and duty-cycle limit to ensure robust operation during

load-fault and short-circuit conditions (see the

Overcurrent Protection section).

typical startup sequence.

After POK is asserted, the MAX5922 activates the zero-

current detection function. This function monitors the

output for an undercurrent condition and eventually

turns off the power to the output if the PD is disconnect-

ed (see the Zero-Current Detection section).

Undervoltage Lockout (UVLO)

The MAX5922 operates from a +32V to +60V supply

voltage range and has a default UVLO set at +38V

(MAX5922A) or +28V (MAX5922B/MAX5922C). The

UVLO threshold is adjustable using a resistive-divider

connected to the UVLO pin (see Figure 7). When the

input voltage is below the UVLO threshold, all operation

stops and the MOSFET is held off. When the input volt-

age is above the UVLO threshold and EN is high, the

MAX5922 goes into operation. See Figures 2 and 4 for

the operational flow charts.

To adjust the UVLO threshold, connect an external

resistive-divider from IN to UVLO and then from UVLO

to AGND. Use the following equation to calculate the

new UVLO threshold:

MAX5922C). The UVLO pin input resistance is 50k

Ω

(min), keep the R1 and R2 parallel combination value at

least 20 times smaller than 50k

Ω to minimize the new

UVLO threshold error.

VV

R

R

UVLO TH

REF

_

=+









1

1

2

21.3ms

t

POK (OPEN-DRAIN)

0V

0

0V

+4V

+8V

+17.5V

+48V

100V/ms (max)

Figure 6. Startup Sequence