MAX5922CEUI datasheet(4/21 Pages) MAXIM

4 / 21 page

+48V, Single-Port Network Power Switch

For Power-Over-LAN

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ELECTRICAL CHARACTERISTICS (continued)

(VIN = 48V, VDIG = 3.3V, AGND_S = AGND = DGND = 0V, RSENSE = 0.5

Ω ±1%, UVLO = open, EN = VDIG, RRCL = 150Ω ±1%, RRDT

= 18.2k

Ω ±1%, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

PD DETECTION (See Figure 3, PD Detection Section)

Detection Probe Voltage Phase I

VPBI

RPD = 19k

Ω to 26.5kΩ

3.6

4.4

Detection Probe Voltage Phase II

VPBII

RPD = 19k

Ω to 26.5kΩ

7.2

8.8

Detection Short-Circuit Current

ISC_DET

OUT shorted to AGND

0.68

1.50

Valid PD Detected Lower-Limit

Threshold

RPDL

(Note 9)

Ω

Valid PD Detected Upper-Limit

Threshold

RPDH

(Note 9)

26.5

33.0

Ω

Total Detection Time

tdet

170

196

Reject Capacitance During

Detection

CPDH

RPD = 19k

Ω to 26.5kΩ

6µF

Allowable Capacitance During

Detection

CPDL

RPD = 19k

Ω to 26.5kΩ

0.6

µF

PD CLASSIFICATION (See PD Classification Mode Section)

IOUT = 0.5mA to 45mA

Classification Probe Voltage

VCLASS

No load

Classification Short-Circuit

Current

ISC_CLASS Shorted to AGND

Classification Time Duration

tCLASS

From detection completion

21.3

Total Detection and Classification

Delay Time

tTOT

From channel-enabled to power delivered

at the OUT pin

191

230

Class 0 to Class 1 Threshold

ICLASS_1L

5.5

6.5

7.5

Class 1 to Class 2 Threshold

ICLASS_1-2

14.5

Class 2 to Class 3 Threshold

ICLASS_2-3

Class 3 to Class 4 Threshold

ICLASS_3-4

Default To Class 0 High-Current

Lower-Limit Threshold

ICLASS_4-0

46.5

Collision Detection Delay Time

(MAX5922A/MAX5922C Only)

tDCA

DCA = high, RPD = 15k

Ω

2.38

2.8

3.22

Note 1: All specifications are 100% production tested at TA = +25°C, unless otherwise noted. All temperature limits are guaranteed by

design.

Note 2: This is the time from an output overcurrent or short-circuit condition until the output goes into regulated current limit.

Note 3: OUT voltage above which the output current limit is at its full value (see Figure 8).

Note 4: To be consistent with the IEEE 802.3af standard, choose RSENSE = 0.5

Ω ±1%.

Note 5: This is the time the part stays in current-limit mode during overload condition. After tOC elapses (or when the junction temperature

hits +150

°C) the part shuts down.

Note 6: See the Typical Operating Characteristics and Figure 6.

Note 7: This is the delay from IOUT falling below the zero-current threshold until ZC goes low and the IC shuts down (see the Zero-Current

Detection section).

Note 8: See the Fault Management section.

Note 9: PD is detected by the procedures specified by the IEEE 802.3af standard. A probe voltage VPBI (+4V typically) is forced at OUT

and the current IS1 is measured after tDET/2. A second probe voltage VPBII (+8V typically) is then forced and IS2 measured after

tDET / 2 again. The voltage increment is then divided by the difference of the two currents (IS2 - IS1). This is the PD resistance value.

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