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AM4376 Datasheet(PDF) 247 Page - Texas Instruments

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Part # AM4376
Description  AM437x Sitara??Processors
PDF  261 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM4376 Datasheet(HTML) 247 Page - Texas Instruments

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10
MMC[x]_CLK (Output)
MMC[x]_CMD (Output)
MMC[x]_DAT[7:0] (Outputs)
11
RMII[x]_REFCLK
(Input)
5
7
6
8
9
AM4376, AM4377, AM4378, AM4379
www.ti.com
SPRS851B – JUNE 2014 – REVISED APRIL 2015
Table 5-128. Switching Characteristics for MMC[x]_CLK
(see Figure 5-141)
STANDARD MODE
HIGH-SPEED MODE
NO.
PARAMETER
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
fop(CLK)
Operating frequency, MMC_CLK
24
48
MHz
tcop(CLK)
Operating period: MMC_CLK
41.7
20.8
ns
5
fid(CLK)
Identification mode frequency, MMC_CLK
400
400
kHz
tcid(CLK)
Identification mode period: MMC_CLK
2500
2500
ns
6
tw(CLKL)
Pulse duration, MMC_CLK low
(0.5*P) - tf(CLK)
(1)
(0.5*P) - tf(CLK)
(1)
ns
7
tw(CLKH)
Pulse duration, MMC_CLK high
(0.5*P) - tr(CLK)
(1)
(0.5*P) - tr(CLK)
(1)
ns
8
tr(CLK)
Rise time, All Signals (10% to 90%)
2.2
2.2
ns
9
tf(CLK)
Fall time, All Signals (10% to 90%)
2.2
2.2
ns
(1) P = MMC_CLK period.
Figure 5-141. MMC[x]_CLK Timing
Table 5-129. Switching Characteristics for MMC[x]_CMD and MMC[x]_DAT[7:0]—HSPE=0
(see Figure 5-142)
OPP50/OPP100
NO.
PARAMETER
1.8 V
3.3 V
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
Delay time, MMC_CLK falling clock
10
td(CLKL-CMD)
-4
14
-4
17.5
ns
edge to MMC_CMD transition
Delay time, MMC_CLK falling clock
11
td(CLKL-DAT)
-4
14
-4
17.5
ns
edge to MMC_DATx transition
Figure 5-142. MMC[x]_CMD and MMC[x]_DAT[7:0] Output Timing—HSPE=0
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
247
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Product Folder Links: AM4376 AM4377 AM4378 AM4379



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