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AM5728 Datasheet(PDF) 224 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 224 Page - Texas Instruments |
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224 / 415 page  AM5728, AM5726 SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 www.ti.com Table 7-8. Manual Functions Mapping for VIP1 2B (continued) BALL BALL NAME VIP1_2B_MANUAL1 VIP1_2B_MANUAL2 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) A_DELAY (ps) G_DELAY (ps) 2 3 4 AB8 mmc3_dat6 2090 208 2310 0 CFG_MMC3_DAT6_IN - - vin2b_de1 AB5 mmc3_dat7 0 0 0 0 CFG_MMC3_DAT7_IN - - vin2b_clk1 B2 vin2a_d16 1163 0 1377 0 CFG_VIN2A_D16_IN vin2b_d7 - - D6 vin2a_d17 1252 0 1457 0 CFG_VIN2A_D17_IN vin2b_d6 - - C5 vin2a_d18 1074 0 1162 0 CFG_VIN2A_D18_IN vin2b_d5 - - A3 vin2a_d19 795 0 958 0 CFG_VIN2A_D19_IN vin2b_d4 - - B3 vin2a_d20 1054 0 1269 0 CFG_VIN2A_D20_IN vin2b_d3 - - B4 vin2a_d21 1075 0 1285 0 CFG_VIN2A_D21_IN vin2b_d2 - - B5 vin2a_d22 1058 0 1252 0 CFG_VIN2A_D22_IN vin2b_d1 - - A4 vin2a_d23 1045 0 1257 0 CFG_VIN2A_D23_IN vin2b_d0 - - G2 vin2a_de0 1723 3 1852 0 CFG_VIN2A_DE0_IN vin2b_fld1 vin2b_de1 - H7 vin2a_fld0 0 0 0 0 CFG_VIN2A_FLD0_IN vin2b_clk1 - - G1 vin2a_hsync0 1438 0 1569 0 CFG_VIN2A_HSYNC0_IN - vin2b_hsync1 - G6 vin2a_vsync0 1142 0 1293 0 CFG_VIN2A_VSYNC0_IN - vin2b_vsync1 - Manual IO Timings Modes must be used to guaranteed some IO timings for VIP2. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-9 Manual Functions Mapping for VIP2 for a definition of the Manual modes. Table 7-9 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-9. Manual Functions Mapping for VIP2 BALL BALL NAME VIP2_MANUAL 1 VIP2_MANUAL2 CFG REGISTER MUXMODE A_DELAY G_DELAY A_DELAY G_DELAY 2 3 4 5 6 (ps) (ps) (ps) (ps) R6 gpmc_a0 2767 156 2980 0 CFG_GPMC_A0_IN vin3a_d16 - vin4a_d0 - vin4b_d0 T9 gpmc_a1 2589 263 2917 0 CFG_GPMC_A1_IN vin3a_d17 - vin4a_d1 - vin4b_d1 N9 gpmc_a10 2593 13 2648 0 CFG_GPMC_A10_IN vin3a_de0 - - - vin4b_clk1 P9 gpmc_a11 2606 228 2918 0 CFG_GPMC_A11_IN vin3a_fld0 - vin4a_fld0 - vin4b_de1 K7 gpmc_a19 1719 0 1729 0 CFG_GPMC_A19_IN - - vin4a_d12 - vin3b_d0 T6 gpmc_a2 2886 400 3156 178 CFG_GPMC_A2_IN vin3a_d18 - vin4a_d2 - vin4b_d2 M7 gpmc_a20 1517 0 1511 0 CFG_GPMC_A20_IN - - vin4a_d13 - vin3b_d1 J5 gpmc_a21 1731 0 1738 0 CFG_GPMC_A21_IN - - vin4a_d14 - vin3b_d2 K6 gpmc_a22 1604 0 1623 0 CFG_GPMC_A22_IN - - vin4a_d15 - vin3b_d3 J7 gpmc_a23 1307 0 1310 0 CFG_GPMC_A23_IN - - vin4a_fld0 - vin3b_d4 224 Timing Requirements and Switching Characteristics Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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