DM385 datasheet(161/281 Pages) TI

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DM385, DM388

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SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

Table 7-26. ARM Cortex-A8 Interrupt Controller (AINTC) Interrupt Sources (continued)

Cortex-A8

ACRONYM

SOURCE

INTERRUPT NUMBER

GPIOINT1B

GPIO1

100

GPMCINT

GPMC

101

DDRERR

DDR

102

–

Reserved

103

HDVICPCONT1SYNC

HDVICP2

104

HDVICPCONT2SYNC

HDVICP2

105

–

Reserved

106

–

Reserved

107

IVA0MBOXINT

HDVICP2 Mailbox

108

–

Reserved

109

–

Reserved

110

–

Reserved

111

–

Reserved

112

TCERRINT0

EDMA TC 0 Error

113

TCERRINT1

EDMA TC 1 Error

114

TCERRINT2

EDMA TC 2 Error

115

TCERRINT3

EDMA TC 3 Error

116-119

–

Reserved

120

SMRFLX_ARM

SmartReflex ARM Domain

121

SMRFLX_CORE

SmartReflex CORE Domain

122

–

Reserved

123

MCMMUINT

Media Controller

124

DMMINT

DMM

125

SPIINT1

SPI1

126

SPIINT2

SPI2

127

SPIINT3

SPI3

Power, Reset, Clocking, and Interrupts

161

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