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DM385 Datasheet(PDF) 158 Page - Texas Instruments |
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DM385 Datasheet(HTML) 158 Page - Texas Instruments |
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158 / 281 page  DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Table 7-25. Maximum Module Clock Frequencies (continued) MAX FREQUENCY MODULE CLOCK SOURCE(S) OPP100 (MHz) L3 Medium SYSCLK4 220 L3 Slow SYSCLK6 110 L4 Fast SYSCLK4 220 L4 Slow SYSCLK6 110 Mailbox SYSCLK6 110 McASP SYSCLK6 110 SYSCLK20 McASP0/1 AUX_CLK 192 SYSCLK21 Media Controller PLL_MEDIACTL 400 MMCSD0/1/2 SYSCLK8 192 OCMC RAM SYSCLK4 220 PCIe SERDES SERDES_CLKx Pins 100 DEV Clock SERDES 20 or 100 SERDES_CLKx Pins SmartReflex DEV Clock 30 SPI0/1/2/3 SYSCLK10 48 Spinlock SYSCLK6 110 Sync Timer SYSCLK18 Fixed 0.032768 SYSCLK18 DEV Clock TIMER1/2/3/4/5/6/7/8 AUX Clock 30 AUD_CLK0/1/2 TCLKIN UART0/1/2 SYSCLK10 48 USB PLL_USB CLKDCO Fixed 960 RTCDIVIDER WDT0 Fixed 0.032768 RCOSC32K 158 Power, Reset, Clocking, and Interrupts Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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