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RUV2

VIN (UVLO,rising) = 1.225 V x

RUV1

+ 1

(

)

VIN(HYS) = IHYS x RUV2

IOUT(MAX)

CIN

4 x CSW x ûVIN

IN(MIN)

OUT

ON(VINMIN)

) T

(25 mV C )

LM5017

SNVS783I – JANUARY 2012 – REVISED OCTOBER 2015

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Assuming VIN = 95 V and substituting ΔVripple = 10 mV gives COUT = 10.1 μF. A 22-μF standard value is selected

for COUT = C9. An X5R or X7R type capacitor with a voltage rating 16 V or higher should be selected.

8.2.1.2.5

Type III Ripple Circuit

Type III ripple circuit as described in Ripple Configuration is chosen for this example. For a constant on-time

converter to be stable, the injected in-phase ripple should be larger than the capacitive ripple on COUT.

Using the type III ripple circuit equation, the target ripple will be greater than the capacitive ripple generated at

the primary output if the following condition is satisfied:

Cr = C6 = 3300 pF

Cac = C8 = 100 nF

(16)

For TON, refer to Equation 3.

Ripple resistor Rr is calculated to be 57.6 kΩ. This value provides the minimum ripple for stable operation. A

smaller resistance should be selected to allow for variations in TON, COUT, and other components. Rr = R4 = 46.4

Ω is selected for this example application.

8.2.1.2.6

VCC and Bootstrap Capacitor

The VCC capacitor provides charge to bootstrap capacitor as well as internal circuitry and low side gate driver.

The Bootstrap capacitor provides charge to high side gate driver. The recommended value for CVCC = C7 = 1 μF.

A good value for CBST = C1 = 0.01 μF.

8.2.1.2.7

Input Capacitor

Input capacitor should be large enough to limit the input voltage ripple as shown in Equation 17.

(17)

Choosing a

ΔVIN = 0.5 V gives a minimum CIN = 1.3 μF. A standard value of 2.2 μF is selected for CIN = C4. The

input capacitor should be rated for the maximum input voltage under all conditions. A 100-V, X7R dielectric

should be selected for this design.

The input capacitor should be placed directly across VIN and RTN (pin 1 and 2) of the IC. If it is not possible to

place all of the input capacitor close to the IC, a 0.47-

μF capacitor should be placed near the IC to provide a

bypass path for the high frequency component of the switching current.

8.2.1.2.8

UVLO Resistors

The UVLO resistors RFB1 and RFB2 set the UVLO threshold and hysteresis according to the relationship shown in

Equation 18 and Equation 19.

(18)

(19)

Where:

IHYS = 20 μA

Setting UVLO hysteresis of 2.5 V and UVLO rising threshold of 12 V results in RUV1 = 14.53 kΩ and

RUV2 = 125 kΩ. Selecting standard values of RUV1 = R7 = 14 kΩ and RUV2 = R5 = 127 kΩ results in UVLO

threshold and hysteresis of 12.4 V and 2.5 V respectively.

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