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LM5019 Datasheet(PDF) 3 Page - Texas Instruments

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Part # LM5019
Description  100-V, 100-mA Constant On-Time Synchronous Buck Regulator
PDF  30 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM5019 Datasheet(HTML) 3 Page - Texas Instruments

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UVLO
3
RON
4
RTN
1
VIN
2
8
SW
7
BST
6
VCC
5
FB
Power
PAD-8
Exp Pad
SW
BST
VCC
FB
8
7
6
5
1
2
3
4
UVLO
RON
RTN
VIN
WSON-8
Exp Pad
LM5019
www.ti.com
SNVS788F – JANUARY 2012 – REVISED DECEMBER 2014
5 Pin Configuration and Functions
8-Pin SO PowerPAD
8-Pin WSON
DDA Package
NGU Package
Top View
Top View
Connect Exposed Pad to RTN
Connect Exposed Pad to RTN
Pin Functions
PIN
I/O
DESCRIPTION
APPLICATION INFORMATION
NO.
NAME
1
RTN
—
Ground
Ground connection of the integrated circuit.
2
VIN
I
Input Voltage
Operating input range is 7.5 V to 100 V.
Resistor divider from VIN to UVLO to GND programs the
undervoltage detection threshold. An internal current source is
Input Pin of Undervoltage
3
UVLO
I
enabled when UVLO is above 1.225 V to provide hysteresis. When
Comparator
UVLO pin is pulled below 0.66 V externally, the parts goes in
shutdown mode.
A resistor between this pin and VIN sets the switch on-time as a
4
RON
I
On-Time Control
function of VIN. Minimum recommended on-time is 100 ns at max
input voltage.
This pin is connected to the inverting input of the internal regulation
5
FB
I
Feedback
comparator. The regulation level is 1.225 V.
Output From the Internal High
The internal VCC regulator provides bias supply for the gate drivers
6
VCC
O
Voltage Series Pass Regulator.
and other internal circuitry. A 1.0-
μF decoupling capacitor is
Regulated at 7.6 V
recommended.
An external capacitor is required between the BST and SW pins
7
BST
I
Bootstrap Capacitor
(0.01-
μF ceramic). The BST pin capacitor is charged by the VCC
regulator through an internal diode when the SW pin is low.
Power switching node. Connect to the output inductor and bootstrap
8
SW
O
Switching Node
capacitor.
Exposed pad must be connected to RTN pin. Connect to system
—
EP
—
Exposed Pad
ground plane on application board for reduced thermal resistance.
Copyright © 2012–2014, Texas Instruments Incorporated
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3
Product Folder Links: LM5019



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