| Electronic Components Datasheet Search |
|
MT9074AP Datasheet(PDF) 67 Page - Mitel Networks Corporation |
|
|
|||||||||||||||||||||||||||||
MT9074AP Datasheet(HTML) 67 Page - Mitel Networks Corporation |
|
67 / 122 page ![]() Advance Information MT9074 67 Bit Name Functional Description 7 TXMSG Transmit Message Mode. If high, the data contained in the Transmit Message Register (address 18H, page 1) is transmitted in the corresponding DS1 time slot. If zero, the data on DSTi is transmitted on the corresponding DS1 time slot. 6 PCI Per Channel Inversion. When set high the data for this channel sourced from DSTi is inverted before being transmit onto the equivalent DS1 channel; the data received from the incoming DS1 channel is inverted before it emerges from DSTo. 5 RTSL Remote Time Slot Loopback. If one, the corresponding DS1 receive time slot is looped to the corresponding DS1 transmit time slot. This received time slot will also be present on DSTo. If zero, the loopback is disabled. 4 LTSL Local Time Slot Loopback. If one, the corresponding transmit time slot is looped to the corresponding receive time slot. This transmit time slot will also be present on the transmit DS1 stream. If zero, this loopback is disabled. 3 TTST Transmit Test. If one, a test signal, either digital milliwatt (when control bit ADSEQ is one) or PRBS (Z15-1) (ADSEQ is zero), will be transmitted in the corresponding DS1 time slot. More than one time slot may be activated at once. If zero, the test signal will not be connected to the corresponding time slot. 2 RTST Receive Test. If one, the corresponding DSTo time slot will be used for testing. If control bit ADSEQ is one, a digital milliwatt signal will be transmitted into the DSTo channel. If ADSEQ is zero, the receive channel will be connected to the PRBS (215 - 1) detector. Table 75 - Per Time Slot Control Words (Pages 7 and 8) (T1) 1 RPSIG Serial Signaling Enable. If set low, the transmit signaling buffer for the equivalent DS1 channel will be sourced from the ST-BUS channel on CSTi associated with it. If set high the transmit signaling RAM must be programmed via the microport. 0CC Clear Channel. When set high no robbed bit signaling is inserted in the equivalent transmit DS1 channel. When set low robbed bit signaling is included in every 6th channel. Bit Name Functional Description Table 75 - Per Time Slot Control Words (Pages 7 and 8) (T1) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |