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MT9162AS Datasheet(PDF) 9 Page - Mitel Networks Corporation

Part # MT9162AS
Description  ISO2-CMOS 5 Volt Single Rail Codec
PDF  17 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT9162AS Datasheet(HTML) 9 Page - Mitel Networks Corporation

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Advance Information
MT9162
7-169
† AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing.
† Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing.
AC Characteristics† for D/A (Receive) Path - 0dBm0 = A
Lo3.17 - 3.17dB = 1.773Vrms for µ-Law and
0dBm0 = ALo3.14 - 3.14dB = 1.843Vrms for A-Law, at the Codec. (VRef=0.6 volts and VBias=2.5 volts.)
Characteristics
Sym
Min
Typ‡
Max
Units
Test Conditions
1
Analog output at the Codec full
scale
ALo3.17
ALo3.14
7.225
7.481
Vp-p
Vp-p
µ-Law
A-Law
2
Absolute half-channel gain.
Din to AOUT
±
GAR1
-0.8
0
0.8
dB
@1020Hz
3
Gain tracking vs. input level
ITU-T G.714 Method 2
GTR
-0.3
-0.6
-1.6
0.3
0.6
1.6
dB
dB
dB
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
4
Signal to total distortion vs. input
level.
ITU-T G.714 Method 2
GQR
35
29
24
dB
dB
dB
0 to -30 dBm0
-40 dBm0
-45 dBm0
5
Receive Idle Channel Noise
NCR
NPR
7
-84
10
-80
dBrnC0
dBm0p
µ-Law
A-Law
6
Gain relative to gain at 1020Hz
200Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
GRR
-0.25
-0.90
0.25
0.25
0.25
-12.5
-25
dB
dB
dB
dB
dB
7
Absolute Delay
DAR
240
µs
at frequency of min. delay
8
Group Delay relative to DAR
DDR
750
380
130
750
µs
µs
µs
µs
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
9
Crosstalk
D/A to A/D
A/D to D/A
CTRT
CTTR
-74
-80
dB
dB
G.714.16
ITU-T
Electrical Characteristics† for Analog Outputs
Characteristics
Sym
Min
Typ‡
Max
Units
Test Conditions
1
Load impedance at Output
EZL
20k
ohms
across AOUT
±
2
Allowable output capacitive
load
ECL
20
pF
each pin:
AOUT+,
AOUT-
3
Analog output harmonic
distortion
ED
0.5
%
20k ohms load across
AOUT
±
VO
≤693mV
RMS



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