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AP4201 Datasheet(PDF) 3 Page - Asahi Kasei Microsystems |
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AP4201 Datasheet(HTML) 3 Page - Asahi Kasei Microsystems |
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3 / 27 page ![]() [AP4201] 015008157-E-00 - 3 - 2015/09 4. Block Diagram and Functions ■ Block Diagram UVLO LDO1 5.0V VIN VDC1 THERMAL SHUTDOWN VREF LEDR0 IREF POR 1.4MHz OSC 2-bit DIVIDER 8-bit COUNTER 216-bit REGISTER CONTROL LOGIC SCI INTERFACE PWM GENERATOR 0 PWM GENERATOR 0 PWM GENERATOR 0 PWM GENERATOR 26 CSB/LAT SCK/CLK TxD/SI RxD/SO 5.0V LEDG0 LEDB8 27 EN EN TSD A0 A1 A2 A3/CLRB GND PGND A4/ENB SCIFEN SCIEN ISET_R VDC LOW SIDE CURRENT SINK Constant Current or Open Drain 1.0V LEDB0 LEDR1 LEDG1 LEDB1 ISET_G ISET_B 5.0V DRSET DRSET 1.0 mF 1.0 mF RISET_R RISET_G RISET_B PWMSET PWM PWM VDC2 1.0 mF 1.8V LDO2 VIN Figure 1.Block Diagram ■ Function No Block Function 1 SCI INTERFACE In case of SCI: hold the setting data of the PWM gradation. In case of serial F/F: hold the PWM gradation data. 2 CONTROL LOGIC Detect SCI instruction, control the operation mode. 3 “216-bit” REGISTER Hold the 8-bit PWM gradation data of LEDR0~8, LEDG0~8 and LEDB0~8. 4 PWM GENERATOR Compare PWM gradation with counter and generate PWM wave. 5 1.4MHz OSC Generate 1.4MHz clock. 6 “2-bit” DIVIDER Divide 1.4MHz clock to 256 gradation clock. 7 “8-bit” COUNTER Count with the 256 gradation clock within PWM period. 8 UVLO Generate reset signal for preventing unstable operating when input power voltage. decreased. 9 LDO1 Generate an internal 5 voltage. It can supply less than 30mA for driving external circuit. 10 LDO2 Generate an internal 1.8 voltage. Driving external circuit is forbidden. 11 VREF Generate a reference voltage. 12 IREF Generate a reference current. 13 POR Generate reset signal at power start up. 14 LOW SIDE CURRENT SINK LED output driver which can set to current source or open drain output. Over current protection circuit is built in. 15 THERMAL SHUTDOWN Shut down the LED current and set the VDC1,VDC2 pins to 0 voltage when internal temperature is more than setting value. |
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