DLPC3433 datasheet(28/62 Pages) TI1

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RESETZ

500 ms max

2C access to DLPC343x should not start until

HOST_IRQ goes low (this should occur within 500 ms

from the release of RESETZ.

HOST_IRQ

(with External

Pullup)

0 ms min

(INIT_BUSY)

(ERR IRQ)

3 µs min

An active high pulse on HOST_IRQ following the

initialization period indicates an error condition

was detected. The source of the error is reported

in the system status.

The first falling edge of HOST_IRQ

indicates auto-initialization done.

DLPC3433, DLPC3438

DLPS035B – FEBRUARY 2014 – REVISED JANUARY 2016

www.ti.com

7 Parameter Measurement Information

7.1 HOST_IRQ Usage Model

•

While reset is applied HOST_IRQ will reset to tri-state (an external pullup pulls the line high).

•

HOST_IRQ will remain tri-state (pulled high externally) until the microprocessor boot completes. While the

signal is pulled high, this indicates that the ASIC is performing boot-up and auto-initialization.

•

As soon as possible after boot-up, the microprocessor will drive HOST_IRQ to a logic high state to indicate

that the ASIC is continuing to perform auto-initialization (no real state change occurs on the external signal)

•

Upon completion of auto-initialization, software will set HOST_IRQ to a logic low state to indicate the

completion of auto-initialization. (At the falling edge, the system is said to enter the INIT_DONE state.)

•

After auto-initialization completes, HOST_IRQ is used to generate a logic high interrupt pulse to the host

through software control. (This interrupt indicates that the ASIC has detected an error condition or otherwise

requires service.)

Figure 10. Host IRQ Timing

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DLPC3433 Datasheet(PDF) 28 Page - Texas Instruments