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TUSB3210 Datasheet(PDF) 23 Page - Texas Instruments

Part # TUSB3210
Description  UNIVERSAL SERIAL BUS GENERAL-PURPOSE DEVICE CONTROLLER
PDF  44 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TUSB3210 Datasheet(HTML) 23 Page - Texas Instruments

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2–11
2.4.12 IEPSIZXY_n: Input Endpoint X/Y-Buffer Size (n=1 to 3)
7
6
5
4
3
210
RSV
S6
S5
S4
S3
S2
S1
S0
R/O
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
NAME
RESET
FUNCTION
6–0
S[6:0]
x
X AND Y-Buffer size:
0000.0000b > Count = 0
0000.0001b > Count = 1 byte
:
:
0011.1111b > Count = 63 bytes
0100.0000b > Count = 64 bytes
Any value
≥ 100.0001b produces unpredictable results.
7
RSV
x
Reserved
2.5
Endpoint-0 Descriptor Registers
Unlike EDB-1 to EDB-3, which are defined as memory entries in SRAM, Endpoint-0 is described by a set of 4 registers
(two for output and two for input). Table 2–5 defines the registers and their respective addresses used for EDB-0
description. EDB-0 has no Base-Address-Register, since these addresses are hardwired to FEF8 and FEF0. Note
that the bit positions have been preserved to provide consistency with EDB-n (n = 1 to 3).
Table 2–5. Input/Output EDB-0 Registers
ADDRESS
REGISTER NAME
DESCRIPTION
BASE ADDRESS
FF83
OEPBCNT_0
Output endpoint_0: byte count register
FF82
OEPCNFG_0
Output endpoint_0: configuration register
FEF0
FF81
IEPBCNT_0
Input endpoint_0: byte count register
FF80
IEPCNFG_0
Input endpoint_0: configuration register
FEF8
2.5.1
IEPCNFG_0: Input Endpoint-0 Configuration Register
7
6
5
4
3
210
UBME
RSV
TOGLE
RSV
STALL
USBIE
RSV
RSV
R/W
R/O
R/O
R/O
R/W
R/W
R/O
R/O
BIT
NAME
RESET
FUNCTION
1–0
RSV
0
Reserved
2
USBIE
0
USB interrupt enable on transaction completion. Set/clear by MCU
USBIE = 0 No interrupt
USBIE = 1 Interrupt on transaction completion
3
STALL
0
USB stall condition indication. Set/clear by MCU.
STALL = 0
No stall
STALL = 1
USB stall condition. If set by MCU, a STALL handshake is initiated and the bit is cleared
automaticallly by next setup transaction.
4
RSV
0
Reserved
5
TOGLE
0
USB toggle bit. This bit reflects the toggle sequence bit of DATA0, DATA1
6
RSV
0
Reserved
7
UBME
0
UBM enable/disable bit. Set/clear by MCU.
UBME = 0 UBM cannot use this endpoint.
UBME = 1 UBM can use this endpoint.



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