ADA8282 datasheet(15/27 Pages) AD

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Data Sheet

AD8283

Rev. C | Page 15 of 27

CHANNEL OVERVIEW

Each channel contains an LNA, a PGA, and an AAF in the

signal path. The LNA input impedance can be either 200 Ω or

200 kΩ. The PGA has selectable gains that result in channel

gains ranging from 16 dB to 34 dB. The AAF has a three-pole

elliptical response with a selectable cutoff frequency. The mux

is synchronized with the ADC and automatically selects the

next active channel after the ADC acquires a sample.

The signal path is fully differential throughout to maximize

signal swing and reduce even-order distortion including the

LNA, which is designed to be driven from a differential signal

source.

Low Noise Amplifier(LNA)

Good noise performance relies on a proprietary ultralow noise

LNA at the beginning of the signal chain, which minimizes the

noise contributions on the following PGA and AAF. The input

impedance can be either 200 Ω or 200 kΩ and is selected through

the SPI port or by the ZSEL pin.

The LNA supports differential output voltages as high as 4.0 V p-p

with positive and negative excursions of ±1.0 V froma common-

mode voltage of 1.5 V. With the output saturation level fixed,

the channel gain sets the maximum input signal before

saturation.

Low value feedback resistors and the current-driving capability

of the output stage allow the LNA to achieve a low input-

referred noise voltage of 3.5 nV/√Hz at a channel gain of 34 dB.

The use of a fully differential topology and negative feedback

minimizes second-order distortion. Differential signaling

enables smaller swings at each output, further reducing third-

order distortion.

Recommendation

To achieve the best possible noise performance, it is important

to match the impedances seen by the positive and negative

inputs. Matching the impedances ensures that any common-

mode noise is rejected by the signal path.

AntialiasingFilter(AAF)

The filter that the signal reaches prior to the ADC is used to

band limit the signal for antialiasing.

The antialiasing filter uses a combination of poles and zeros to

create a third-order elliptical filter. An elliptical filter is used to

achieve a sharp roll off after the cutoff frequency. The filter uses

on-chip tuning to trim the capacitors to set the desired cutoff

frequency. This tuning method reduces variations in the cutoff

frequency due to standard IC process tolerances of resistors

and capacitors. The default −3 dB low-pass filter cutoff is 1/3 or

1/4 the ADC sample clock rate. The cutoff can be scaled to 0.7,

0.8, 0.9, 1, 1.1, 1.2, or 1.3 times this frequency through the SPI.

Tuning is normally off to avoid changing the capacitor settings

during critical times. The tuning circuit is enabled and disabled

through the SPI. Initializing the tuning of the filter must be

performed after initial power-up and after reprogramming the

filter cutoff scaling or ADC sample rate. Occasional retuning

during an idle time is recommended to compensate for

temperature drift.

A cut-off range of 1 MHz to 12 MHz is possible. An example

follows:

•

Four channels selected: A, B, C, and AUX

•

ADC clock: 30 MHz

•

Per channel sample rate = 30/4 = 7.5 MSPS

•

Default tuned cutoff frequency = 7.5/4 = 1.88 MHz

Muxand Mux Controller

The mux is designed to automatically scan through each active

channel. The mux remains on each channel for one clock cycle,

then switches to the next active channel. The mux switching is

synchronized to the ADC sampling so that the mux switching

and channel settling time do not interfere with ADC sampling.

As indicated in Table 9, Register Address 0C, Flex Mux Control,

Channel A, is usually the first converted input. The one

exceptions occurs when Channel AUX is the sole input (see

Figure 26 for timing). Channel AUX is always forced to be the

last converted input. Unselected codes put the respective

channels (LNA, PGA, and Filter) in power-down mode unless

timing of the clock input and data/DSYNC outputs.

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