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ADuC7122BBCZ Datasheet(PDF) 87 Page - Analog Devices |
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ADuC7122BBCZ Datasheet(HTML) 87 Page - Analog Devices |
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87 / 96 page ![]() Data Sheet ADuC7122 78B TIMER2—WAKE-UP TIMER Timer2 is a 32-bit wake-up timer, count down or count up, with a programmable prescaler. The prescaler is clocked directly from 1 of 4 clock sources, including the core clock (default selection), the internal 32.768 kHz oscillator, the external 32.768 kHz watch crystal, or the PLL undivided clock. The selected clock source can be scaled by a factor of 1, 16, 256, or 32,768. The wake-up timer continues to run when the core clock is disabled. This gives a minimum resolution of 22 ns when the core is operating at 41.78 MHz and with a prescaler of 1. Capture of the current timer value is enabled if the Timer2 interrupt is enabled via IRQEN[4] (see Table 128). The counter can be formatted as plain 32-bit value or as hours:minutes:seconds:hundredths. Timer2 reloads the value from T2LD either when Timer2 overflows or immediately when T2ICLR is written. The Timer2 interface consists of four MMRs, shown in Table 158. Table 158. Timer2 Interface Registers Register Description T2LD 32-bit register. Holds 32-bit unsigned integers. T2VAL 32-bit register. Holds 32-bit unsigned integers. This register is read only. T2CLRI 8-bit register. Writing any value to this register clears the Timer2 interrupt. T2CON Configuration MMR. Table 159. Timer2 Load Registers Name Address Default Value Access T2LD 0xFFFF0340 0x00000 R/W T2LD is a 32-bit register, which holds the 32-bit value that is loaded into the counter. Table 160. Timer2 Clear Register Name Address Default Value Access T2CLRI 0xFFFF034C 0x00 W This 8-bit write-only MMR is written (with any value) by user code to refresh (reload) Timer2. Table 161. Timer2 Value Register Name Address Default Value Access T2VAL 0xFFFF0344 0x0000 R T2VAL is a 32-bit register that holds the current value of Timer2. Table 162. Timer2 Control Register Name Address Default Value Access T2CON 0xFFFF0348 0x0000 R/W This 32-bit MMR configures the mode of operation for Timer2. Rev. A | Page 87 of 96 |
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