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LT3430

sn3430 3430is

Input Voltage vs Operating Frequency Considerations

The absolute maximum input supply voltage for the LT3430

is specified at 60V. This is based solely on internal semi-

conductor junction breakdown effects. Due to internal

power dissipation, the actual maximum VIN achievable in

a particular application may be less than this.

A detailed theoretical basis for estimating internal power

loss is given in the section, Thermal Considerations. Note

that AC switching loss is proportional to both operating

frequency and output current. The majority of AC switch-

ing loss is also proportional to the

square of input voltage.

For example, while the combination of VIN = 40V, VOUT =

5V at 2A and fOSC = 200kHz may be easily achievable,

simultaneously raising VIN to 60V and fOSC to 700kHz is

not possible. Nevertheless, input voltage

transients up to

60V can usually be accommodated, assuming the result-

ing increase in internal dissipation is of insufficient time

duration to raise die temperature significantly.

A second consideration is controllability. A potential limi-

tation occurs with a high step-down ratio of VIN to VOUT,

as this requires a correspondingly narrow minimum switch

on time. An approximate expression for this (assuming

continuous mode operation) is given as follows:

Min t

OUT

IN OSC

()

where:

VIN = input voltage

VOUT = output voltage

VF = Schottky diode forward drop

fOSC = switching frequency

A potential controllability problem arises if the LT3430 is

called upon to produce an on time shorter than it is able to

produce. Feedback loop action will lower then reduce the

VC control voltage to the point where some sort of cycle-

skipping or odd/even cycle behavior is exhibited.

In summary:

1. Be aware that the simultaneous requirements of high

VIN, high IOUT and high fOSC may not be achievable in

practice due to internal dissipation. The Thermal Con-

siderations section offers a basis to estimate internal

power. In questionable cases a prototype supply should

be built and exercised to verify acceptable operation.

2. The simultaneous requirements of high VIN, low VOUT

and high fOSC can result in an unacceptably short

minimum switch on time. Cycle skipping and/or odd/

even cycle behavior will result although correct output

voltage is usually maintained.

FREQUENCY COMPENSATION

Before starting on the theoretical analysis of frequency

response, the following should be remembered—the worse

the board layout, the more difficult the circuit will be to

stabilize. This is true of almost all high frequency analog

circuits, read the Layout Considerations section first.

Common layout errors that appear as stability problems

are distant placement of input decoupling capacitor and/

or catch diode, and connecting the VC compensation to a

ground track carrying significant switch current. In addi-

tion, the theoretical analysis considers only first order

non-ideal component behavior. For these reasons, it is

important that a final stability check is made with produc-

tion layout and components.

The LT3430 uses current mode control. This alleviates

many of the phase shift problems associated with the

inductor. The basic regulator loop is shown in Figure 10.

The LT3430 can be considered as two gm blocks, the error

amplifier and the power stage.

Figure 11 shows the overall loop response. At the VC pin,

the frequency compensation components used are:

RC = 3.3k, CC = 0.022µF and CF = 220pF. The output

capacitor used is a 100

µF, 10V tantalum capacitor with

typical ESR of 100m

Ω.

The ESR of the tantalum output capacitor provides a useful

zero in the loop frequency response for maintaining stabil-

ity. This ESR, however, contributes significantly to the

ripple voltage at the output (see Output Ripple Voltage in

the Applications Information section). It is possible to

reduce capacitor size and output ripple voltage by replac-

ing the tantalum output capacitor with a ceramic output

capacitor because of its very low ESR. The zero provided

by the tantalum output capacitor must now be reinserted

back into the loop. Alternatively, there may be cases

APPLICATIO S I FOR ATIO

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