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LT3430 Datasheet(PDF) 24 Page - Linear Technology |
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LT3430 Datasheet(HTML) 24 Page - Linear Technology |
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24 / 28 page ![]() 24 LT3430 sn3430 3430is APPLICATIO S I FOR ATIO DUAL OUTPUT SEPIC CONVERTER The circuit in Figure 14 generates both positive and negative 5V outputs with a single piece of magnetics. The two inductors shown are actually just two windings on a standard Coiltronics inductor. The topology for the 5V output is a standard buck converter. The – 5V topology would be a simple flyback winding coupled to the buck converter if C4 were not present. C4 creates a SEPIC (single-ended primary inductance converter) topology which improves regulation and reduces ripple current in L1. Without C4, the voltage swing on L1B compared to L1A would vary due to relative loading and coupling losses. C4 provides a low impedance path to maintain an equal voltage swing in L1B, improving regulation. In a flyback converter, during switch on time, all the converter’s energy is stored in L1A only, since no current flows in L1B. At switch off, energy is transferred by magnetic coupling into L1B, powering the – 5V rail. C4 pulls L1B positive during switch on time, causing current to flow, and energy to build in L1B and C4. At switch off, the energy stored in both L1B and C4 supply the –5V rail. This reduces the current in L1A and changes L1B current waveform from square to triangular. For details on this circuit, including maximum output currents, see Design Note 100. POSITIVE-TO-NEGATIVE CONVERTER The circuit in Figure 15 is a positive-to-negative topology using a grounded inductor. It differs from the standard approach in the way the IC chip derives its feedback signal because the LT3430 accepts only positive feedback sig- nals. The ground pin must be tied to the regulated negative output. A resistor divider to the FB pin then provides the proper feedback voltage for the chip. The following equation can be used to calculate maximum load current for the positive-to-negative converter: I I VV VV f L VV VV VV MAX P IN OUT OUT IN OUT IN OUT IN OUT F = + ++ – ()( ) ()( )( ) ()( – . ) (– . )( ) 2 015 015 IP = Maximum rated switch current VIN = Minimum input voltage VOUT = Output voltage VF = Catch diode forward voltage 0.15 = Switch voltage drop at 3A Example: with VIN(MIN) = 5.5V, VOUT = 12V, L = 10µH, VF = 0.52V, IP = 3A: IMAX = 0.6A. VOUT 5V VOUT –5V † * L1 IS A SINGLE CORE WITH TWO WINDINGS COILTRONICS #CTX25-4A † IF LOAD CAN GO TO ZERO, AN OPTIONAL PRELOAD OF 1k TO 5k MAY BE USED TO IMPROVE LOAD REGULATION D1, D3: 30BQ060 VIN 7.5V TO 60V GND 3430 F14 C2 0.68 µF CF 220pF D1 C1 100 µF 10V TANT C5 100 µF 10V TANT C3 4.7 µF 100V CERAMIC C4 100 µF 10V TANT D2 MMSD914TI D3 L1A* 25 µH L1B* R1 15.4k R2 4.99k + + + RC 3.3k CC 0.022 µF BOOST VIN LT3430 SHDN SYNC SW FB VC GND Figure 14. Dual Output SEPIC Converter |
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