REV. 0

–20–

AD1980

AC ’97 2.2 AMAP Compliant Default SPDIF Slot Assignments

Codec ID

Function

SPSA = 00

SPSA = 01

SPSA = 10

SPSA = 11

00

2-Ch Primary w/SPDIF

3 and 4

7 and 8 [default]

6 and 9

10 and 11

00

4-Ch Primary w/SPDIF

3 and 4

7 and 8

6 and 9[default]

10 and 11

00

6-Ch Primary w/SPDIF

3 and 4

7 and 8

6 and 9

10 and 11[default]

01

+2-Ch Secondary w/SPDIF

3 and 4

7 and 8

6 and 9[default]

01

+4-Ch Secondary w/SPDIF

3 and 4

7 and 8

6 and 9

10 and 11[default]

10

+2-Ch Secondary w/SPDIF

3 and 4

7 and 8

6 and 9[default]

10

+4-Ch Secondary w/SPDIF

3 and 4

7 and 8

6 and 9

10 and 11[default]

11

+2-Ch Secondary w/SPDIF

3 and 4

7 and 8

6 and 9

10 and 11[default]

PCM Front DAC Rate Register (Index 2Ch)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

2Ch PCM Front

SRF15 SRF14 SRF13 SRF12 SRF11 SRF10 SRF9 SRF8 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0 BB80h

DAC Rate

This read/write Sample Rate Control Register contains 16-bit unsigned value, representing the rate of operation in Hz.

SRF[15:0]

Sample Rate.

The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments. If zero is written to

VRA, then the sample rate is reset to 48 kHz.

PCM LFE (and CENTER) DAC Rate Register (Index 30h)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

C DAC

Rate

This read/write sample rate control register contains 16-bit unsigned value, representing the rate of operation in Hz.

This register sets the sample rate for the LFE DAC and Center DAC. This register’s reset default is to be locked to the PCM Front DAC sample rate register (2-Ch) .

To unlock the register bit, SRU in Register 76h must be asserted.

SRCL[15:0]

Sample Rate.

The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.

If zero is written to VRA, then the sample rate is reset to 48 kHz.

PCM Surround DAC Rate Register (Index 2Eh)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

2Eh PCM Surr

SRS15 SRS14 SRS13 SRS12 SRS11 SRS10 SRS9 SRS8 SRS7 SRS6

SRS5

SRS4 SRS3

SRS2 SRS1 SRS0

BB80h

DAC Rate

This read/write Sample Rate Control Register contains 16-bit unsigned value, representing the rate of operation in Hz.

This register sets the sample rate for the surround DAC. This register’s reset default is to be locked to the PCM front DAC sample rate register (2-Ch).

To unlock this register, Bit SRU in Register 76h must be asserted.

SRS[15:0]

Sample Rate.

The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.

If zero is written to VRA bit, then the sample rate is reset to 48 kHz.

PCM ADC Rate Register (Index 32h)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

32h

PCM L/R

SRA15

SRA14 SRA13 SRA12 SRA11 SRA10 SRA9 SRA8 SRA7 SRA6 SRA5 SRA4 SRA3 SRA2 SRA1 SRA0 BB80h

ADC Rate

This read/write sample rate control register contains 16-bit unsigned value, representing the rate of operation in Hz.

SRA[15:0]

Sample Rate.

The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.

If zero is written to VRA, then the sample rate is reset to 48 kHz.