DP83905AVQB datasheet(67/80 Pages) NSC

Part #	DP83905AVQB

Description	AT Local Area Network Twisted-Pair Interface Controller

PDF	80 Pages

Scroll/Zoom	100%

Manufacturer	NSC [National Semiconductor (TI)]

Direct Link	http://www.national.com

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67 / 80 page

60 Operation of ATLANTIC Controller (Continued)

Boot PROM Write Bus Timing

TLF11498 – 50

This is the type of cycle used to write to the boot PROM These accesses are entirely asynchronous with the ATLANTIC

Controller responding when it decodes the correct address on SA0 – 19 and a SMWR If AEN is high the cycle will be ignored

CHRDY is deasserted if the ATLANTIC Controller is not ready to respond and asserted when ready If it is ready immediately

CHRDY is not deasserted M16 is only generated if the ATLANTIC Controller is 1) in shared memory mode AND 2) DWID

is high AND 3) 816-bit in Control Register 2 is high AND 4) the LA17 – 23 lines match the corresponding values in

Control Register 2

The data will normally be taken from SD0 – 7 However if M16 is generated and the access is to an odd

address the data will be taken from SD8 – 15 The data will always be driven onto MSD0 – 7 The BPWR bit of Configuration

DP83905AVQB Datasheet(PDF) 67 Page - National Semiconductor (TI)