DP83905AVQB datasheet(10/80 Pages) NSC

10 / 80 page

40 Functional Description (Continued)

Shared Memory Compatible Mode IO Address

Mapping

The shared memory is at an address decided by the Ad-

dress Decode Register and the base IO address of

ATLANTIC Controller is configured in Configuration Regis-

ter A At that address the following structure appears

Addr

D7 – 0

Control 1

AT detect

(Read only)

Unused

Control 2

Unused

Node addr 0

(Read only)

Node addr 1

(Read only)

Node addr 2

(Read only)

Node addr 3

(Read only)

Node addr 4

(Read only)

Node addr 5

(Read only)

05h

(Read only)

Checksum

(Read only)

NIC

registers

(a)

D15

0000H

8kx16

Buffer RAM

4000H

Aliased

Buffer RAM

8000H

Aliased

Buffer RAM

C000H

Aliased

Buffer RAM

FFFFH

(b)

FIGURE 3 Shared Memory Mode a) Register

Mapping and b) NIC Core Memory Map

The AT Detect Register indicates whether ATLANTIC Con-

troller is in an 8- or 16-bit slot The least significant bit of this

mode and low in 8-bit mode Addresses 08H to 10H are

specified as the PROM space for compatibility with the Eth-

ercard PLUS16 This is actually an array of 8-bit registers

which are loaded from an external EEPROM after

ATLANTIC Controller is initialized by a reset pulse The

user should program the EEPROM to contain these values

The 8k words of memory can be accessed directly by the

host system in the same manner as any other memory Typ-

ically the programmer would remove data from this buffer

using a ‘‘MOV’’ or ‘‘MOVSW’’ instruction

8-BIT SHARED MEMORY COMPATIBLE MODE

In this mode the IO map remains the same The NIC core

can still operate in 16-bit mode if bit 6 of Control Register 2

is set high and the full 16 kbytes of RAM are still available

However only 8-bit system accesses are allowed If bit 6 of

Control register 2 is low the NIC core must operate in 8-bit

mode and only 8k of memory is available The NIC Core

data width is set by the WTS bit in the Data Configuration

A low cost card using only one 8 kbyte RAM can be de-

signed If the DWlD pin is left unconnected or tied to GND

then the ATLANTIC Controller will always operate in 8-bit

mode regardless of the slot the board is in

If DWID is low the address bits of Control Register 2 should

not be written to as they have no effect In this mode the

address comparator assumes that SA19 is to be compared

to a logic high with the other address comparisons pro-

grammed into Control Register 1

SHARED MEMORY NON-COMPATIBLE MODE

These modes are similar to the compatible mode The dif-

ference is that they map a full 64 kbytes of RAM into the

PC’s memory address space The IO map remains the

same

IO PORT ARCHITECTURE

TLF11498 – 6

FIGURE 4 IO Port

This is the architecture used by Novell’s NE2000 In this

mode the ATLANTIC Controller’s internal memory map is

accessed byte or word at a time via a port within the sys-

tem’s IO space ATLANTIC Controller is programmed by

the user to control the transfers between its internal memo-

ry and the IO port

In this mode the ATLANTIC Controller’s internal registers

and the memory access port are accessed within the sys-

tem’s IO map The address within this IO map is set by

Configuration Register A

DP83905AVQB Datasheet(PDF) 10 Page - National Semiconductor (TI)

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