ADF4107

OUTLINE DIMENSIONS

16

9

8

1

PIN 1

SEATING

PLANE

8°

0°

4.50

4.40

4.30

6.40

BSC

5.10

5.00

4.90

0.65

BSC

0.15

0.05

1.20

MAX

0.20

0.09

0.75

0.60

0.45

0.30

0.19

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-153AB

Figure 30. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)—Dimensions shown in millimeters

1

20

5

6

11

16

15

BOTTOM

VIEW

10

2.25

2.10 SQ

1.95

0.75

0.55

0.35

0.30

0.23

0.18

0.50

BSC

12° MAX

0.20

REF

1.00 MAX

0.65 NOM

0.05

0.02

0.00

1.00

0.90

0.80

SEATING

PLANE

PIN 1

INDICATOR

TOP

VIEW

3.75

BSC SQ

4.0

BSC SQ

COPLANARITY

0.08

COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1

0.60

MAX

0.60

MAX

Figure 31. 20-Lead Frame Chip Scale Package [LFCSP] (CP-20)—Dimensions shown in millimeters

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the

human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

ORDERING GUIDE

Model

Temperature Range

Package Option

ADF4107BRU

–40°C to + 85°C

RU-16

ADF4107BRU–REEL

–40°C to + 85°C

RU-16

ADF4107BRU–REEL7

–40°C to + 85°C

RU-16

ADF4107BCP

–40°C to + 85°C

CP-20

ADF4107BCP–REEL

–40°C to + 85°C

CP-20

ADF4107BCP–REEL7

–40°C to + 85°C

CP-20

RU = Thin Shrink Small Outline Package (TSSOP)

CP = Chip Scale Package

Contact the factory for chip availability.

Note that aluminum bond wire should not be used with the ADF4107 die.

© 2003 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective companies.

C03338-0-5/03(0)

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