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WM8962B Datasheet(PDF) 120 Page - Wolfson Microelectronics plc |
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WM8962B Datasheet(HTML) 120 Page - Wolfson Microelectronics plc |
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120 / 295 page ![]() WM8962 120 Rev 4.3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R41 (29h) SPKOUTR volume 8 SPKOUT_VU N/A Speaker Output PGA Volume Update Writing a 1 to this bit will update SPKOUTL_VOL and SPKOUTR_VOL volumes simultaneously. 7 SPKOUTR_ZC 0 SPKOUTR_VOL (Right Speaker Output PGA) Zero Cross Enable 0 = Zero cross disabled 1 = Zero cross enabled 6:0 SPKOUTR_VOL [6:0] 00h (Mute) Right Speaker Output PGA Volume 000_0000 to 010_1111 = Mute 011_0000 to 011_0101 = -68dB 011_0110 = -67dB …in 1dB steps 111_1001 = 0dB … 111_1111 = +6dB (See Table 73 for output PGA volume control range) R49 (31h) Class D Control 1 2 SPKOUT_VU N/A Speaker Output PGA Volume Update Writing a 1 to this bit will update SPKOUTL_VOL and SPKOUTR_VOL volumes simultaneously. 1 SPKOUTL_PGA_MUTE 0 SPKOUTL_VOL (Left Speaker Output PGA) Mute 0 = Un-mute 1 = Mute 0 SPKOUTR_PGA_MUTE 0 SPKOUTR_VOL (Right Speaker Output PGA) Mute 0 = Un-mute 1 = Mute Table 72 Speaker Output PGA (SPKOUTL_VOL, SPKOUTR_VOL) Control |
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