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WM8962B Datasheet(PDF) 135 Page - Wolfson Microelectronics plc |
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WM8962B Datasheet(HTML) 135 Page - Wolfson Microelectronics plc |
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135 / 295 page ![]() WM8962 Rev 4.3 135 DC SERVO ACTIVE MODES The DC Servo Start-Up mode described above is suitable for initialising the DC offset correction circuit on the input or output signal paths as part of a controlled start-up sequence which is executed before the signal path is fully enabled. The WM8962 also supports DC offset measurement and correction on the HP output paths whilst the signal path is active; this may be of benefit following a large change in signal gain, which can lead to a change in DC offset level. Writing a logic 1 to HP1L_DCS_SYNC initiates a series of DC offset measurements and applies the necessary correction to the HPOUTL output. Writing a logic 1 to HP1R_DCS_SYNC initiates a series of DC offset measurements and applies the necessary correction to the HPOUTR output. The number of DC Servo operations performed is determined by HP1_DCS_SYNC_STEP. A maximum of 127 operations may be selected, though a much lower value will be sufficient in most applications. The DC Servo uses filtering to measure the DC offset in the presence of any audio that may be present; this requires a longer time to perform the correction process than in the Start-Up mode, and means that the DC Servo may be operating for several seconds after the process was initiated. The DC Servo Sync mode described above is supported on the HPOUT DC Servo channels; individual register control is provided for each channel. It is recommended that the DC Servo Sync mode is scheduled whenever a large change in signal gain (eg. >6dB) is applied in the output signal path. Note that the DC Servo Sync mode is not required on the input signal paths as the DC offset in these paths does not change with gain, and only the Start-Up correction is necessary. The DC Servo control fields associated with Sync mode (suitable for use on a signal path that is in active use) are described in Table 83. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R61 (3Dh) DC Servo 1 4 HP1L_DCS_SYN C 0 Writing 1 to this bit selects a series of DC offset corrections for HPOUTL 0 HP1R_DCS_SYN C 0 Writing 1 to this bit selects a series of DC offset corrections for HPOUTR R64 (40h) DC Servo 4 13:7 HP1_DCS_SYNC _STEP [6:0] 10h Number of DC Servo updates to perform in a series event (HPOUTL and HPOUTR) 00h to 0Fh = Reserved 10h = 16 (default) 11h = 17 … 7Fh = 127 Table 83 DC Servo Active Modes |
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