WM8962B datasheet(133/295 Pages) WOLFSON

133 / 295 page

WM8962

Rev 4.3

133

DC SERVO

The WM8962 provides four DC servo circuits - two on the headphone outputs HPOUTL and

HPOUTR, and two on the analogue input paths INL and INR. The DC servo circuits remove offset

from these signal paths.

Removal of DC offset on the headphone outputs is important because any deviation from GND at the

output pin will cause current to flow through the load under quiescent conditions, resulting in

increased power consumption. Additionally, the presence of DC offsets can result in audible pops and

clicks at power up and power down. The DC servo ensures that the DC level on the headphone

outputs is within 1.2mV of GND.

Removal of DC offset on the input paths is important because any deviation from VMID at the ADC

input will prevent correct operation of the zero-cross detection and may also restrict the maximum

analogue input signal level. (Zero-cross detection is available for PGA volume updates, including

when the PGA is controlled by the ALC control.)

The recommended usage of the DC Servo is initialised by running the default Start-Up sequence as

described in the “Control Write Sequencer” section. The default Start-Up sequence executes a series

of DC offset corrections, after which the measured offset correction is maintained on the headphone

output channels.

Updates to the DC Servo correction can also be scheduled using register writes, including during

audio playback. The relevant control fields are described in the following paragraphs and are defined

in Table 82.

DC SERVO ENABLE AND START-UP

The DC Servo circuits are enabled on HPOUTL and HPOUTR by setting HP1L_DCS_ENA and

HP1R_DCS_ENA respectively. Equivalent registers are provided for the analogue input paths INL and

INR. When the DC Servo is enabled, the DC offset correction can be commanded in different ways,

as described below.

Writing a logic 1 to HP1L_DCS_STARTUP initiates a series of DC offset measurements and applies

the necessary correction to the HPOUTL output. On completion, the output will be within 1.2mV of

AGND. This is the DC Servo mode selected by the default Start-Up sequence. Completion of this DC

offset correction is indicated by the DCS_STARTUP_DONE_HP1L, as described in Table 82.

The DC Servo Start-Up function is supported on all four DC Servo channels; individual register control

is provided for each channel. The DC Servo Start-Up can be commanded on multiple channels

simultaneously if required. Typically, this operation takes 24ms per channel.

The DC Servo control fields associated with start-up operation are described in Table 82. For

Headphone output DC offset correction, it is important to note that the DC Servo Start-Up mode

should be commanded as part of a control sequence which includes muting and shorting of the

headphone outputs; a suitable sequence is defined in the default Start-Up sequence

(see “Control

Write Sequencer

”). See also the “Headphone Output Paths” section for the details of the

recommended Headphone Enable/Disable sequence.

Note that, once the DC offset correction has been performed, the measured offset will be maintained

in memory, even when the associated signal path is disabled. This means that, if required, the DC

offset correction can be performed on all channels during start-up, and each channel may then be

disabled or enabled when required, without having to re-schedule the DC offset correction.

The DC Servo circuit uses the Charge Pump power supply. The Charge Pump must be enabled by

setting the CP_ENA register bit and ensuring that a suitable clock (eg. MCLK) is present. If these

conditions are not met, then DC offset correction cannot be performed. S

ee “Charge Pump” and

“Clocking and Sample Rates” for details of the associated controls.

WM8962B Datasheet(PDF) 133 Page - Wolfson Microelectronics plc

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