WM8962B datasheet(136/295 Pages) WOLFSON

136 / 295 page

WM8962

136

Rev 4.3

REFERENCE VOLTAGES AND BIAS CONTROL

This section describes the analogue reference voltage and bias current controls. It also describes the

VMID soft-start circuit for pop suppressed start-up and shut-down. Note that, under the recommended

usage conditions of the WM8962, these features will be configured by running the default Start-Up

and Shut-

Down sequences as described in the “Control Write Sequencer” section. In these cases, the

user does not need to set these register fields directly.

ANALOGUE REFERENCE AND MASTER BIAS

The analogue circuits in the WM8962 require a mid-rail analogue reference voltage, VMID. This

reference is generated from AVDD via a programmable resistor chain. The VMID reference generator

requires a bias current, which is enabled by STARTUP_BIAS_ENA. Together with the external VMID

decoupling capacitor, the programmable VMID resistor chain results in a slow, normal or fast charging

characteristic on VMID. This is controlled by the VMID_SEL register, and can be used to optimise the

reference for normal operation, low power standby or for fast start-up as described in Table 84. For

normal operation, the VMID_SEL field should be set to 01.

A soft-start circuit is provided in order to control the switch-on of the VMID reference; this is enabled

by setting VMID_RAMP. When the soft-start circuit is enabled prior to enabling VMID_SEL, the VMID

reference rises smoothly, without any step change that could otherwise occur.

The analogue circuits in the WM8962 require a bias current. The normal bias current is enabled by

setting BIAS_ENA. Note that the normal bias current source requires VMID to be enabled also.

The analogue inputs to the WM8962 are biased to VMID in normal operation. In order to avoid audible

pops caused by a disabled signal path dropping to AGND, the WM8962 can maintain these

connections at VMID when the relevant input stage is disabled. This is achieved by connecting a

buffered VMID reference to the input or output. The buffered VMID reference is enabled by setting

VMID_BUF_ENA.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R25 (19h)

Pwr Mgmt

(1)

8:7

VMID_SEL

[1:0]

VMID Divider Enable and Select

00 = VMID disabled (for OFF mode)

01 = 2 x 50k divider (for normal operation)

10 = 2 x 250k divider (for low power standby)

11 = 2 x 5k divider (for fast start-up)

BIAS_ENA

Enables the Normal bias current generator (for

all analogue functions)

0 = Disabled

1 = Enabled

R28 (1Ch)

Anti-pop

STARTUP_B

IAS_ENA

Enables the Start-Up bias current generator

0 = Disabled

1 = Enabled

VMID_BUF_

ENA

VMID Buffer Enable

0 = Disabled

1 = Enabled

VMID_RAMP

Enables VMID soft ramp-up

0 = Disabled

1 = Enabled

Table 84 Reference Voltages and Master Bias Enable

INPUT SIGNAL PATH BIAS CONTROL SETTINGS

All the analogue circuits of the WM8962 require a bias current. The bias current in the input signal

path circuits can be controlled using the register bits described in Table 85.

When adjusting the bias settings, there is always a trade-off between performance and power.

Selecting a lower bias can be used to reduce power consumption, but may have a marginal impact on

audio performance in some usage modes. Selecting a higher bias offers a performance improvement,

but also an increase in power consumption.

WM8962B Datasheet(PDF) 136 Page - Wolfson Microelectronics plc

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