Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

WM8962B Datasheet(PDF) 143 Page - Wolfson Microelectronics plc

Part # WM8962B
Description  Ultra-Low Power Stereo CODEC with Audio Enhancement DSP, 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers
PDF  295 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8962B Datasheet(HTML) 143 Page - Wolfson Microelectronics plc

Back Button WM8962B Datasheet HTML 139Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 140Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 141Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 142Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 143Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 144Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 145Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 146Page - Wolfson Microelectronics plc WM8962B Datasheet HTML 147Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 143 / 295 page
background image
WM8962
Rev 4.3
143
When TDM is enabled, the ADCDAT pin will be tri-stated immediately before and immediately after
data transmission, to allow another ADC device to drive this signal line for the remainder of the
sample period. Note that it is important that two ADC devices do not attempt to drive the data pin
simultaneously. A short circuit may occur if the transmission time of the two ADC devices overlap with
each other. See “Audio Interface Timing” for details of the ADCDAT output relative to BCLK signal.
Note that it is possible to ensure a gap exists between transmissions by setting the transmitted word
length to a value higher than the actual length of the data. For example, if 32-bit word length is
selected where only 24-bit data is available, then the WM8962 interface will tri-state after transmission
of the 24-bit data, ensuring a gap after the WM8962
’s TDM slot.
When TDM is enabled, BCLK frequency must be high enough to allow data from both time slots to be
transferred. The relative timing of Slot 0 and Slot 1 depends upon the selected data format as shown
in Figure 50 to Figure 54.
SLOT 0
LEFT CHANNEL
RIGHT CHANNEL
1/fs
LRCLK
BCLK
DACDAT/
ADCDAT
SLOT 1
SLOT 0
SLOT 1
Figure 50 TDM in Right-Justified Mode
LEFT CHANNEL
RIGHT CHANNEL
1/fs
LRCLK
BCLK
DACDAT/
ADCDAT
SLOT 0
SLOT 1
SLOT 0
SLOT 1
Figure 51 TDM in Left-Justified Mode
LEFT CHANNEL
RIGHT CHANNEL
1/fs
LRCLK
BCLK
DACDAT/
ADCDAT
1 BCLK
1 BCLK
SLOT 0
SLOT 1
SLOT 0
SLOT 1
Figure 52 TDM in I2S Mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com