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CLC5902 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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CLC5902 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 28 page  ©1999 National Semiconductor Corporation Rev. 3.05 May 27, 1999 May 1999 N CLC5902 Dual Digital Tuner/AGC 0 0 General Overview The CLC5902 Dual Digital Tuner/AGC IC is a two channel digital downconverter (DDC) with integrated automatic gain control (AGC). The CLC5902 is a key component in the Diversity Receiver Chipset (DRCS) which includes one CLC5902 Dual Digital Tuner/AGC, two CLC5956 12-bit analog-to-digital converters (ADCs), and two CLC5526 digitally controlled variable gain amplifiers (DVGAs). A block diagram for a Diversity Receiver Chipset based narrowband communications system is shown in Figure 1. This system allows direct IF sampling of signals up to 300MHz for enhanced receiver performance and reduced system costs. The CLC5902 offers high dynamic range digital tuning and filtering based on hard-wired digital signal processing (DSP) technology. Each channel has independent tuning, phase offset, and gain settings. Channel filtering is performed by a series of three filters. The first is a 4-stage Cascaded Integrator Comb (CIC) filter with a programmable decimation ratio from 8 to 2048. Next there are two symmetric FIR filters, a 21-tap and a 63-tap, both with programmable coefficients. The first FIR filter decimates the data by 2, the second FIR decimates by either 2 or 4. Channel filter bandwidth at 52MSPS ranges from ±650kHz down to ±1.3kHz. The CLC5902’s AGC controller monitors the ADC output and controls the ADC input signal level by adjusting the DVGA setting. AGC threshold, deadband+hysteresis, and the loop time constant are user defined. Total dynamic range of greater than 120dB full- scale signal to noise can be achieved with the Diversity Receiver Chipset. Figure 1 Diversity Receiver Chipset Block Diagram DVGA ADC IF A SerialOutA/B SerialOutB SCK SFS RDY LC DVGA ADC IF B LC ParallelOutput[15..0] ParallelOutputEnable ParallelSelect[2..0] Dual Digital CLC5526 CLC5956 CLC5902 CLK Tuner/AGC 12 4 12 Features n 52MSPS Operation n Two Independent Channels with 14-bit inputs n Greater than 100 dB image rejec- tion n Greater than 100 dB spurious free dynamic range n 0.02 Hz tuning resolution n User Programmable AGC n Channel Filters include a Fourth Order CIC followed by 21-tap and 63-tap Symmetric FIRs n FIR filters process 21-bit Data with 16-bit Programmable Coeffi- cients n Flexible output formats include 12-bit Floating Point or 8, 16, 24, and 32 bit Fixed Point n Serial and Parallel output ports n JTAG Boundary Scan n 8-bit Microprocessor Interface n 380mW/channel, 52 MHz, 3.3V n 128 pin PQFP package Applications n Cellular Basestations n Satellite Receivers n Wireless Local Loop Receivers n Digital Communications |
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