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LP5551 Datasheet(PDF) 32 Page - Texas Instruments

Part # LP5551
Description  LP5551 PowerWise??Technology Compliant Energy Management Unit
PDF  38 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LP5551 Datasheet(HTML) 32 Page - Texas Instruments

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1
FS x 8 x COUT
)
VPP = ILPP (RESR +
LP5551
SNVS417B – DECEMBER 2006 – REVISED APRIL 2013
www.ti.com
OUTPUT CAPACITOR
The switching converters in the LP5551 are designed to be used with a 22uF ceramic output capacitor. The
dielectric should be X5R, X7R, or comparable material to maintain proper tolerances. The output capacitor of the
switching converter absorbs the AC ripple current from the inductor and provides the initial response to a load
transient. The ripple voltage at the output of the converter is the product of the ripple current flowing through the
output capacitor and the impedance of the capacitor. The impedance of the capacitor can be dominated by
capacitive, resistive, or inductive elements within the capacitor, depending on the frequency of the ripple current.
Ceramic capacitors are predominately used in portable systems and have very low ESR and remain capacitive
up to high frequencies.
The switcher peak - to - peak output voltage ripple in steady state can be calculated as:
(7)
LDO INFORMATION
The LDOs included in the LP5551 provide static supply voltages for various functions in the processor. Use the
following sections to determine loading and external components.
LDO LOADING CAPABILITY
The LDOs in the LP5551 can regulate to a variety of output voltages, depending on the need of the processor.
These voltages can be programmed through the PWI. Table 1 summarizes the parameters of the LP5551 LDOs.
Table 2. LDO Parameters
Recommended
Output voltage
Dropout Voltage
PWI Register
Maximum Output
Typical Load
range
(typical)
Current
LDO1
R8
0.6 V – 2.2 V
100 mA
200 mV
PLL
LDO2
R7
1.5 V – 3.3 V
250 mA
150 mV
I/O
LDO3
R2
VOSW + 0.05 V(1)
50 mA
200 mV
Memory/Memory
retention
0.7 V – 1.35 V(2)
LDO4
R12
1.5 V – 3.3 V
250 mA
150 mV
User defined
(1)
LDO3 tracks the switching converter output voltage (VOSW) plus a 50 mV offset when the LP5551 is in active state.
(2)
LDO3 regulates at the set memory retention voltage when the LP5551 is in shutdown state.
LDO OUTPUT CAPACITOR
The output capacitor sets a low frequency pole and a high frequency zero in the control loop of an LDO. The
capacitance and the equivalent series resistance (ESR) of the capacitor must be within a specified range to meet
stability requirements. The LDOs in the LP5551 are designed to be used with ceramic output capacitors. The
dielectric should be X5R, X7R, or comparable material to maintain proper tolerances. Use the following table to
choose a suitable output capacitor:
Table 3. Output Capacitor Selection Guide
Output Capacitance Range
ESR range
(Recommended Typical Value)
LDO1
1 µF – 20 µF (2.2 µF)
5 mohm – 500 mohm
LDO2
2 µF – 20 µF (4.7 µF)
5 mohm – 500 mohm
LDO3
0.7 µF – 2.2 µF (1.0 µF)
5 mohm– 500 mohm
LDO4
2 µF – 20 µF (4.7 µF)
5 mohm – 500 mohm
32
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