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LP5551 Datasheet(PDF) 11 Page - Texas Instruments |
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LP5551 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 38 page ![]() LP5551 www.ti.com SNVS417B – DECEMBER 2006 – REVISED APRIL 2013 AVS/DVS Switcher Characteristics Unless otherwise noted, VDD_A, _D, VPVDD1,2 , RESETN, ENABLE = 3.6V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, -40 to +125°C (1) (2) (3) Symbol Parameter Conditions Min Typ Max Units VOUT Accuracy IOUT = 200 mA, VOUT = 1.2 V, Output Voltage -4.1% 1.2 4.3% V VDD_A, _D, VPVDD1,2 = 3.6 V VOUT Range Programmable Output Voltage 0.6 1.2 1.2 V Programming Resolution = 4.7 mV Range ΔVOUT 2.7V < VDD_A, _D, VPVDD1,2 <5.5 V, Line regulation 0.18 %/V IOUT = 10 mA VDD_A, _D, VPVDD1,2 = 3.6 V Load regulation 0.011 %/mA IOUT = 100-300 mA IQ Quiescent current consumption IOUT = 0 mA 15 µA RDSON(P) P-FET resistance VDD_A, _D, VPVDD1,2 = VGS = 3.6 V 425 690 m Ω RDSON(N) N-FET resistance VDD_A, _D, VPVDD1,2 = VGS = 3.6 V 345 635 m Ω ILIM Switch peak current limit 2.7 V < VDD_A, _D <5.5 V 350 520 750 mA fOSC Internal oscillator frequency PWM-mode 805 1000 1125 kHz COUT Output Capacitance 22 µF 0 mA ≤ IOUT ≤ 300 mA Output Capacitor ESR 5 500 m Ω L Inductor inductance 0 mA ≤ IOUT ≤ 300 mA 4.7 µH RVFB VFB pin resistance to ground 150 440 k Ω (1) All voltages are with respect to the potential at the GND pin. (2) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with TJ = 25C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control. (3) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors are (MLCCs) used in setting electrical characteristics Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LP5551 |
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