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OPA688P Datasheet(PDF) 13 Page - Texas Instruments |
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OPA688P Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 18 page ![]() OPA688 13 SBOS082A DESIGN-IN TOOLS APPLICATIONS SUPPORT The Texas Instruments Applications Department is available for design assistance at 1-972-644-5580. The Texas Instrments web site (http://www.ti.com) has the latest data sheets and other design aids. DEMONSTRATION BOARDS A PC board is available to assist in the initial evaluation of circuit performance of the OPA688U. It is available as an unpopulated PCB with descriptive documentation. See the demonstration board literature for more information. The summary information for this board is shown in Table I. c) Place external components close to the OPA688. This minimizes inductance, ground loops, transmission line ef- fects and propagation delay problems. Be extra careful with the feedback (RF), input and output resistors. d) Use high-frequency components to minimize parasitic elements. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter lay- out. Metal film or carbon composition axially-leaded resis- tors can also provide good performance when their leads are as short as possible. Never use wirewound resistors for high- frequency applications. Remember that most potentiometers have large parasitic capacitances and inductances. Multilayer ceramic chip capacitors work best and take up little space. Monolithic ceramic capacitors also work very well. Use RF type capacitors with low ESR and ESL. The large power pin bypass capacitors (2.2 µF to 6.8µF) should be tantalum for better high-frequency and pulse perfor- mance. e) Choose low resistor values to minimize the time constant set by the resistor and its parasitic parallel capacitance. Good metal film or surface mount resistors have approximately 0.2pF parasitic parallel capacitance. For resistors > 1.5k Ω, this adds a pole and/or zero below 500MHz. Make sure that the output loading is not too heavy. The recommended 402 Ω feedback resistor is a good starting point in your design. f) Use short direct traces to other wideband devices on the board. Short traces act as a lumped capacitive load. Wide traces (50 to 100 mils) should be used. Estimate the total capacitive load at the output, and use the series isolation resistor recom- mended in the typical performance curve “RS vs Capacitive Load”. Parasitic loads < 2pF may not need the isolation resistor. g) When long traces are necessary, use transmission line design techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50 Ω transmis- sion line is not required on board—a higher characteristic impedance will help reduce output loading. Use a matching series resistor at the output of the op amp to drive a transmission line, and a matched load resistor at the other end to make the line appear as a resistor. If the 6dB of attenuation that the matched load produces is not acceptable, and the line is not too long, use the series resistor at the source only. This will isolate the source from the reactive load presented by the line, but the frequency response will be degraded. Multiple destination devices are best handled as separate transmission lines, each with its own series source and shunt load terminations. Any parasitic impedances acting on the terminating resistors will alter the transmission line match, and can cause unwanted signal reflections and reactive loading. h) Do not use sockets for high-speed parts like the OPA688. The additional lead length and pin-to-pin capacitance intro- duced by the socket creates an extremely troublesome para- sitic network. Best results are obtained by soldering the part onto the board. LITERATURE DEMONSTRATION REQUEST BOARD PACKAGE PRODUCT NUMBER DEM-OPA68xU SO-8 OPA68xU MKT-351 TABLE I. Demo Board Summary Information. Contact the Texas Instruments Technical Applications Sup- port Line at 1-972-644-5580 for availability of these boards. OPERATING INFORMATION THEORY OF OPERATION The OPA688 is a voltage-feedback op amp that is unity-gain stable. The output voltage is limited to a range set by the voltage on the limiter pins (5 and 8). When the input tries to overdrive the output, the limiters take control of the output buffer. This avoids saturating any part of the signal path, giving quick overdrive recovery and excellent limiter accuracy at any signal gain. The limiters have a very sharp transition from the linear region of operation to output limiting. This allows the limiter voltages to be set very near (< 100mV) the desired signal range. The distortion performance is also very good near the limiter voltages. CIRCUIT LAYOUT Achieving optimum performance with the high-frequency OPA688 requires careful attention to layout design and component selection. Recommended PCB layout techniques and component selection criteria are: a) Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Open a window in the ground and power planes around the signal I/O pins, and leave the ground and power planes unbroken elsewhere. b) Provide a high quality power supply. Use linear regulators, ground plane and power planes to provide power. Place high- frequency 0.1 µF decoupling capacitors < 0.2" away from each power-supply pin. Use wide, short traces to connect to these capacitors to the ground and power planes. Also use larger (2.2 µF to 6.8µF) high-frequency decoupling capacitors to by- pass lower frequencies. They may be somewhat further from the device, and be shared among several adjacent devices. |
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