VT8231 datasheet(87/132 Pages) ETC

87 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-81-

Function 3 Registers - USB Controller Ports 2-3

7HFKQRORJLHV ,QF

:H &RQQHFW

USB-Specific Configuration Registers

Offset 40 - Miscellaneous Control 1.................................RW

PCI Memory Command Option

Support Memory-Read-Line, Memory-Read-

Multiple, & Memory-Write-&-Invalidate.... def

Only support Mem Read, Mem Write Cmds

Babble Option

Automatically disable babbled port when EOF

babble occurs..........................................default

1Don’t disable babbled port

PCI Parity Check Option

Disable PERR# generation.....................default

Enable parity check and PERR# generation

Frame Interval Select

1 ms frame..............................................default

0.1 ms frame

USB Data Length Option

Support TD length up to 1280................default

Support TD length up to 1023

USB Power Management

Disable USB power management...........default

Enable USB power management

1DMA Option

8 DW burst access with better FIFO latency def

16 DW burst access (original performance)

0PCI Wait States

Zero wait ................................................default

1One wait

Offset 41 - Miscellaneous Control 2 ................................ RW

USB 1.1 Improvement for EOP

USB Specification 1.1 Compliant.......... default

If a bit stuffing error occurs before EOP, the

receiver will accept the packet

USB Specification 1.0 Compliant

If a bit stuffing error occurs before EOP, the

receiver will ignore the packet

6-5

Reserved (Do Not Program) .................... default = 0

Hold PCI Request for Successive Accesses

Disable

Enable .................................................... default

Setting this bit to “enable” causes the system to treat

the USB request as higher priority

Frame Counter Test Mode

Disable................................................... default

1Enable

2Trap Option

Set trap 60/64 status bits only when trap 60/64

enable bits are set. ................................. default

Set trap 60/64 status bits without checking

enable bits

A20gate Pass Through Option

Pass through A20GATE command sequence

defined in UHCI .................................... default

1Don’t pass through Write I/O port 64 (ff)

USB IRQ Test Mode

Normal Operation .................................. default

Generate USB IRQ

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