VT8231 datasheet(114/132 Pages) ETC

114 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-108-

Function 5 & 6 Registers - AC97 Audio & Modem Codecs

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Function 5 & 6 Registers - AC97 Audio & Modem Codecs

The codec interface is hardware compatible with AC97 and

SoundBlaster Pro. There are two sets of software accessible

registers: PCI configuration registers and I/O registers. The

PCI configuration registers for the Audio Codec are located in

the function 5 PCI configuration space of the VT8231. The

PCI configuration registers for the Modem Codec are located

in the function 6 PCI configuration space. The I/O registers

are located in the system I/O space.

PCI Configuration Space Header – Function 5 Audio

Offset 1-0 - Vendor ID .......................................................RO

0-7

Vendor ID

................. (1106h = VIA Technologies)

Offset 3-2 - Device ID.........................................................RO

0-7

Device ID

(3058h = VT8231 Audio Codec)

Offset 5-4 - Command.......................................................RW

15-10 Reserved

........................................ always reads 0

Fast Back-to-Back.......................................fixed at 0

SERR# Enable.............................................fixed at 0

Address Stepping ........................................fixed at 0

Parity Error Response ................................fixed at 0

VGA Palette Snoop .....................................fixed at 0

Memory Write and Invalidate ...................fixed at 0

Special Cycle Monitoring ...........................fixed at 0

2Bus Master .................................................fixed at 0

Memory Space.............................................fixed at 0

I/O Space

............................... default=0 (disabled)

Offset 7-6 - Status ...........................................................RWC

Detected Parity Error .................................fixed at 0

Signalled System Error...............................fixed at 0

Received Master Abort...............................fixed at 0

Received Target Abort ...............................fixed at 0

Signalled Target Abort ...............................fixed at 0

10-9 DEVSEL# Timing

00 Fast

01 Medium .................................................... fixed

10 Slow

11 Reserved

Data Parity Error........................................fixed at 0

Fast Back-to-Back Capable........................fixed at 0

6-5

Reserved

........................................ always reads 0

4PM 1.1

.................................................fixed at 1

3-0

Reserved

........................................ always reads 0

Offset 8 - Revision ID (40h) ...............................................RO

7-0

Silicon Revision Code

Offset 9 - Programming Interface (00h)........................... RO

Offset A - Sub Class Code (01h=Audio Device) ............... RO

Offset B - Base Class Code (04h=Multimedia Device) ..... RO

Offset D - Latency Timer (00h)......................................... RO

Offset E - Header Type (00h)............................................ RO

Offset F - BIST (00h) ......................................................... RO

Offset 13-10 - Base Address 0 – SGD Control / Status .. RW

31-16 Reserved

........................................ always reads 0

15-8 Base Address ......................................... default = 00h

7-0

00000001b (256 bytes)

Offset 17-14 - Base Address 1 – FM NMI Status ........... RW

31-16 Reserved

........................................ always reads 0

15-2 Base Address ..................................... default = 0000h

1-0

01b (4 bytes)

Offset 1B-18 - Base Address 2 – MIDI Port ................... RW

31-16 Reserved

........................................ always reads 0

15-2 Base Address ..................................... default = 0330h

1-0

01b (4 bytes)

Offset 2F-2C – Subsystem ID / Sub Vendor ID............. RO*

*This register is RW if function 5-6 Rx42[5] = 1

Offset 34 – Capture Pointer (Default = C0h) .................. RO

Offset 3C - Interrupt Line................................................ RW

7-4

Reserved

........................................ always reads 0

3-0

Audio Interrupt Routing

0000 Disabled ................................................. default

0001 IRQ1

0010 Reserved

0011 IRQ3

0100 IRQ4

0101 IRQ5

0110 IRQ6

0111 IRQ7

1000 IRQ8

1001 IRQ9

1010 IRQ10

1011 IRQ11

1100 IRQ12

1101 IRQ13

1110 IRQ14

1111 Disabled

Offset 3D - Interrupt Pin (03h) ......................................... RO

Offset 3E - Minimum Grant (00h) .................................... RO

Offset 3F - Maximum Latency (00h) ................................ RO

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