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MSP4458 Datasheet(PDF) 53 Page - Micronas |
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MSP4458 Datasheet(HTML) 53 Page - Micronas |
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53 / 85 page ![]() PRELIMINARY DATA SHEET MSP 44x8G Micronas 53 4.6.2.4. Crystal Recommendations Symbol Parameter Pin Name Min. Typ. Max. Unit General Crystal Recommendations fP Crystal Parallel Resonance Fre- quency at 12 pF Load Capacitance 18.432 MHz RR Crystal Series Resistance 8 25 Ω C0 Crystal Shunt (Parallel) Capacitance 6.2 7.0 pF CL External Load Capacitance1) XTAL_IN, XTAL_OUT PSDIP approx. 1.5 P(L)QFP approx. 3.3 pF pF Crystal Recommendations for Master-Slave Applications (MSP-clock must perform synchronization to I2S clock) fTOL Accuracy of Adjustment −20 +20 ppm DTEM Frequency Variation versus Temperature −20 +20 ppm C1 Motional (Dynamic) Capacitance 19 24 fF fCL Required Open Loop Clock Frequency (Tamb = 25 °C) AUD_CL_OUT 18.431 18.433 MHz Crystal Recommendations for FM / NICAM Applications (No MSP-clock synchronization to I2S clock possible) fTOL Accuracy of Adjustment −30 +30 ppm DTEM Frequency Variation versus Temperature −30 +30 ppm C1 Motional (Dynamic) Capacitance 15 fF fCL Required Open Loop Clock Frequency (Tamb = 25 °C) AUD_CL_OUT 18.4305 18.4335 MHz Crystal Recommendations for all analog FM/AM Applications (No MSP-clock synchronization to I2S clock possible) fTOL Accuracy of Adjustment −100 +100 ppm DTEM Frequency Variation versus Temperature −50 +50 ppm fCL Required Open Loop Clock Frequency (Tamb = 25 °C) AUD_CL_OUT 18.429 18.435 MHz Amplitude Recommendation for Operation with External Clock Input (Cload after reset typ. 22 pF) VXCA External Clock Amplitude XTAL_IN 0.7 Vpp 1) External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop fre- quency of the internal PLL and to stabilize the frequency in closed-loop operation. Due to different layouts, the accurate capacitor size should be determined with the customer PCB. The sug- gested values (1.5...3.3 pF) are figures based on experience and should serve as “start value”. To define the capacitor size, reset the MSP without transmitting any further I2C telegrams. Measure the fre- quency at AUD_CL_OUT-pin. Change the capacitor size until the free running frequency matches 18.432 MHz as closely as possible. The higher the capacity, the lower the resulting clock frequency. |
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