MSP4458 datasheet(60/85 Pages) MICRONAS

60 / 85 page

MSP 44x8G

PRELIMINARY DATA SHEET

Micronas

Fig. 4–23: I2S timing diagram (asynchronous interface)

4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

Analog Ground

VAGNDC0

AGNDC Open Circuit Voltage

8-V Operation:

5-V Operation:

AGNDC

3.77

2.49

Rload ≥10 MΩ

RoutAGN

AGNDC Output Resistance

8-V Operation:

5-V Operation:

125

180

120

Ω

3 V

≤ V

AGNDC ≤ 4 V

Analog Input Resistance

RinSC

SCART Input Resistance

from TA = 0 to 70 °C

SCn_IN_s1)

Ω

fsignal = 1 kHz, I = 0.05 mA

RinMONO

MONO Input Resistance

from TA = 0 to 70 °C

MONO_IN

1524

35k

Ω

fsignal = 1 kHz, I = 0.1 mA

1) “n” means “1”, “2”, “3”, or “4”;

“s” means “L” or “R”

Right aligned (I2S_CONFIG[11] = 1, I2S_CONFIG[9] = 0)

16 Bit data & 16...32 clocks allowed

I2S_WS3

I2S_CL3

I2S_DA_IN3

MSB

1/FI2S3WS

1/FI2S3CL

I2S_CL3

I2S_DA_IN3

I2S_WS3

Th_I2S3

Right sample (I2S_CONFIG[10] = 0)

Right sample (I2S_CONFIG[10] = 1)

Left sample (I2S_CONFIG[10] = 0)

Left sample (I2S_CONFIG[10] = 1)

MSB

LSB

MSB

LSB

I2S_DA_IN3

Left aligned (I2S_CONFIG[9] = 0)

Left aligned (I2S_CONFIG[9] = 1)

16,18...32 Bit data & clocks allowed

Ts_I2S3

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