11

LTC1874

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1874. These items are illustrated graphically for a

single controller in the layout diagram in Figure 6. Check

the following in your layout:

1. Is the Schottky diode closely connected between power

ground (PGND) and the drain of the external MOSFET?

as closely as possible? This capacitor provides AC

current to the MOSFET.

3. Is the input decoupling capacitor (0.1

µF) connected

6. Keep the switching node PGATE away from sensitive

small signal nodes.

resistors? The resistive divider R1 and R2 must be

ground.

GND. Isolate high current power paths from signal

power and signal ground where possible in the layout.

An unbroken ground plane is recommended.

Figure 6. LTC1874 Layout Diagram (See PC Board Layout Checklist)

GND

16

15

14

13

1

2

3

4

PGATE

PGND

1/2 LTC1874

0.1

µF

D1

L1

M1

SW

1874 F06

+

R2

BOLD LINES INDICATE HIGH CURRENT PATHS

R1

+

APPLICATIO S I FOR ATIO

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.