Buffered, Fast-Settling, Octal, 12/10/8-Bit,

Voltage-Output DACs

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5

ELECTRICAL CHARACTERISTICS (continued)

(Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

Analog Supply Voltage

Range

2.70

5.25

V

Digital Supply Voltage

Range

1.8

V

Unity gain

1.5

3.2

SLOW mode, all digital inputs

Force sense

2.4

4.8

Unity gain

2.5

8

Operating Supply

Current

+

FAST mode, all digital inputs

Force sense

3.4

8

mA

Shutdown Supply

Current

+

DACs in shutdown mode

0.5

1

µA

Note 1: For the force-sense versions, FB_ is connected to its respective OUT_. VOUT (max) = VREF / 2, unless otherwise noted.

Note 2: Linearity guaranteed from decimal code 40 to code 4095 for the MAX5590B/MAX5591B (12-bit, B-grade), code 10 to code

1023 for the MAX5592/MAX5593 (10-bit), and code 3 to code 255 for the MAX5594/MAX5595 (8-bit).

Note 3: Represents the functional range. The linearity is guaranteed at VREF = 2.5V (for AVDD from 2.7V to 5.25V), and VREF =

4.096V (for AVDD = 4.5V to 5.25V). See the Typical Operating Characteristics section for linearity at other voltages.

Note 4: DC crosstalk is measured as follows: outputs of DACA–DACH are set to full scale and the output of DACH is measured.

While keeping DACH unchanged, the outputs of DACA–DACG are transitioned to zero scale and the

∆VOUT of DACH is

measured.

Note 5: Guaranteed by design.

Note 6: The reference -3dB bandwidth is measured with a 0.1VP-P sine wave on VREF and with full-scale input code.