CAP1214 datasheet(66/107 Pages) MICROCHIP

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Multiple Channel Capacitive Touch Sensor and LED Driver

Datasheet

Revision 1.0 (08-30-10)

SMSC CAP1214

DATASHEET

6.29

Button Noise Threshold Registers

The Button Noise Threshold Registers control the value of a secondary internal threshold to detect

noise and improve the automatic recalibration routine. If a Capacitive Touch Sensor output exceeds

the Button Noise Threshold but does not exceed the sensor threshold, it is determined to be caused

by a noise spike. That sample is not used by the automatic re-calibration routine.

This feature can be disabled by setting the DIS_DIG_NOISE bit (see Section 6.14, "Configuration

The Button Noise Threshold is proportional to the programmed threshold as shown in Table 6.42.

6.29.1

Button Noise Threshold 1 Register

The Button Noise Threshold 1 Register controls the noise threshold for Capacitive Touch Sensors 1-4.

Bits 7-6 - CH4_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 4.

Bits 5-4 - CH3_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 3.

Bits 3-2 - CH2_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 2.

Bits 1-0 - CH1_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 1.

6.29.2

Button Noise Threshold 2 Register

The Button Noise Threshold 2 Register controls the noise threshold for Capacitive Touch Sensors 5 -

7 and the Grouped sensors.

Bits 7-6 - GR_BN_TH[1:0] - Controls the noise threshold for all grouped Capacitive Touch Sensors.

Bits 5-4 - CH7_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 7.

Bits 3-2 - CH6_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 6.

Bits 1-0 - CH5_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 5.

Table 6.41 Button Noise Threshold Registers

ADDR

R/W

DEFAULT

38h

R/W

Button Noise

Threshold 1

CS4_BN_TH

[1:0]

CS3_BN_TH

[1:0]

CS2_BN_TH

[1:0]

CS1_BN_TH

[1:0]

AAh

39h

R/W

Button Noise

Threshold 2

GR_BN_TH

[1:0]

CS7_BN_TH

[1:0]

CS6_BN_TH

[1:0]

CS5_BN_TH

[1:0]

AAh

Table 6.42 CSx_BN_TH Bit Decode

CSX_BN_TH[1:0]

THRESHOLD DIVIDE SETTING

6.25%

12.5%

25% (default)

50%

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