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MCP39F511 Datasheet(PDF) 41 Page - Microchip Technology |
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MCP39F511 Datasheet(HTML) 41 Page - Microchip Technology |
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41 / 62 page ![]() 2015 Microchip Technology Inc. DS20005393B-page 41 MCP39F511 bit 19 OVERPOW_PIN1: Event pin 1 operation for the Overpower event 1 = Event mapped to Event1 pin only 0 = Event not mapped to a pin (Default) bit 18 OVERCUR_PIN1: Event pin 1 operation for the Overcurrent event 1 = Event mapped to Event1 pin only 0 = Event not mapped to a pin (Default) bit 17 VSURGE_PIN1: Event pin 1 operation for the Voltage Surge event 1 = Event mapped to Event1 pin only 0 = Event not mapped to a pin (Default) bit 16 VSAG_PIN1: Event pin 1 operation for the Voltage Sag event 1 = Event mapped to Event1 pin only 0 = Event not mapped to a pin (Default) bits 15-12 Unimplemented: Read as ‘0’ bit 11 OVERCUR_CL: Reset or clear bit for the Overcurrent event (Note 2) 1 = Event is cleared 0 = Event is not cleared (Default) bit 10 OVERPOW_CL: Reset or clear bit for the Overpower event (Note 2) 1 = Event is cleared 0 = Event is not cleared (Default) bit 9 VSUR_CL: Reset or clear bit for the Voltage Surge event (Note 2) 1 = Event is cleared 0 = Event is not cleared (Default) bit 8 VSAG_CL: Reset or clear bit for the Voltage Sag event (Note 2) 1 = Event is cleared 0 = Event is not cleared (Default) bit 7 VSUR_LA: Latching control of the Voltage Surge event 1 = Event is latched and needs to be cleared 0 = Event does not latch (Default) bit 6 VSAG_LA: Latching control of the Voltage Sag event 1 = Event is latched and needs to be cleared 0 = Event does not latch (Default) bit 5 OVERPOW_LA: Latching control of the Overpower event 1 = Event is latched and needs to be cleared 0 = Event does not latch (Default) bit 4 OVERCUR_LA: Latching control of the Overcurrent event 1 = Event is latched and needs to be cleared 0 = Event does not latch (Default) bit 3 VSUR_TST: Test control of the Voltage Surge event 1 = Simulated event is turned on 0 = Simulated event is turned off (Default) bit 2 VSAG_TST: Test control of the Voltage Sag event 1 = Simulated event is turned on 0 = Simulated event is turned off (Default) bit 1 OVERPOW_TST: Test control of the Overpower event 1 = Simulated event is turned on 0 = Simulated event is turned off (Default) bit 0 OVERCUR_TST: Test control of the Overcurrent event 1 = Simulated event is turned on 0 = Simulated event is turned off (Default) Note 1: The Overtemperature event bits (28-24) are only available on system versions 0xFA14 and later. 2: Writing a 1 to the Clear bit clears the event, either real or simulated through test bits, and then returns to a state of 0. REGISTER 7-1: EVENT CONFIGURATION REGISTER (CONTINUED) |
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