AX8052F131 datasheet(16/29 Pages) ONSEMI

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AX8052F131

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Figure 5. AX8052 Memory Map

XRAM

FLASH

0000−007F

0080−00FF

0100−1FFF

2000−207F

2080−3F7F

3F80−3FFF

4000−4FFF

5000−5FFF

6000−7FFF

8000−FBFF

FC00−FFFF

Address

Calibration Data

IRAM

P (Code) Space

X Space

I (internal) Space

direct access

indirect access

SFR

IRAM

SFR

RREG

RREG (nb)

XREG

FLASH

Calibration Data

The AX8052 uses P or Code Space to access its program.

Code space may also be read using the MOVC instruction.

Smaller amounts of data can be placed in the Internal (see

Note) or Data Space. A distinction is made in the upper half

of the Data Space between direct accesses (MOV reg,addr;

MOV addr,reg) and indirect accesses (MOV reg,@Ri;

MOV @Ri,reg; PUSH; POP); Direct accesses are routed to

the Special Function Registers, while indirect accesses are

routed to the internal RAM.

NOTE: The origin of Internal versus External (X) Space

is historical. External Space used to be outside

of the chip on the original 8052

Microcontrollers.

Large amounts of data can be placed in the External or X

Space. It can be accessed using the MOVX instructions.

Special Function Registers, as well as additional

Microcontroller Registers (XREG) and the Radio Registers

(RREG) are also mapped into the X Space.

Detailed documentation of the Special Function Registers

(SFR) and additional Microcontroller Registers can be

found in the AX8052 Programming Manual.

The Radio Registers are documented in the AX5031

Programming Manual. Register Addresses given in the

AX5031 Programming Manual are relative to the beginning

of RREG, i.e. 0x4000 must be added to these addresses. It

is recommended that the provided AX8052F131.h header

file is used; Radio Registers are prefixed with AX5031_ in

the AX8052F131.h header file to avoid clashes of

same−name Radio Registers with AX8052 registers.

Normally, accessing Radio Registers through the RREG

address range is adequate. Since Radio Register accesses

have a higher latency than other AX8052 registers, the

AX8052 provides a method for non−blocking access to the

Radio Registers. Accessing the RREG (nb) address range

initiates a Radio Register access, but does not wait for its

completion. The details of mechanism is documented in the

Radio Interface section of the AX8052 Programming

Manual.

The FLASH memory is organized as 64 pages of 1 kBytes

each. Each page can be individually erased. The write word

size is 16 Bits. The last 1 kByte page is dedicated to factory

calibration data and should not be overwritten.

Power Management

The microcontroller power mode can be selected

independently from the transmitter. The microcontroller

supports the following power modes:

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