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PM5347 Datasheet(PDF) 99 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 99 Page - PMC-Sierra, Inc |
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99 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 83 TACPI: The TACPI bit is a logic one when an interrupt request is active from the TACP block. The TACP interrupt sources are enabled in the TACP Interrupt Control/Status Register. SPTBI: The SPTBI bit is a logic one when an interrupt request is active from the SPTB block. The SPTB interrupt sources are enabled in the SPTB Control Register and the SPTB Path Signal Label Status Register. SSTBI: The SSTBI bit is a logic one when an interrupt request is active from the SSTB block. The SSTB interrupt sources are enabled in the SSTB Control Register and the SSTB Synchronization Message Status Register. MISCI: The MISCI bit is a logic one when an interrupt request is active from the Parallel Input/Output block, the S1 Change Block, the Clock Synthesis Block, the Clock Recovery Block, the BERM block or the APS Block. The Parallel Input/Output interrupt sources are enabled in the S/UNI-PLUS Parallel Input Port Enable Register. The S1 Change interrupt and the APS interrupt sources are enabled in the S/UNI-PLUS APS Control/Status Register. The Clock Synthesis interrupt soure is enabled in the S/UNI-PLUS Clock Synthesis Control and Status Register. The Clock Recovery interrupt soure is enabled in the S/UNI-PLUS Clock Recovery Control and Status Register. The BERM interrupt source is enabled in the BERM Control Register. |
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