OV7620 datasheet(16/60 Pages) ETC

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OV7620 Product Specifications - Rev. 1.2 (5/13/00)

OMNIVISION TECHNOLOGIES INC.

Preliminary Company Confidential

1.6 ZV Port Interlace Timing

The ZV Port is a single-source uni-directional video bus between a PC Card socket and a VGA

controller. The ZV Port complies with CCIR601 timing to allow NTSC decoders to deliver real-

time digital video straight into the VGA frame buffer from a PC Card. OV7620 support ZV Port

Timing, which output signal can be output to a PC Card directly, then to VGA controller. The tim-

ing is as below:

FIG 1.4 ZV Port Timing

Notes: ZV Port format output signal include:

VSYNC: Vertical sync pulse.

HREF: Horizontal valid data output window.

PCLK: Pixel clock used to clock valid data and CHSYNC into ZV Port. Default frequency is 13.5MHz when

use 27MHz as system clock. Rising edge of PCLK is used to clock the 16 Bit data.

Y<7:0>: 8 Bit luminance data bus..

UV<7:0>: 8 Bit chrominance data bus.

All Timing Parameters is list in following table.‘

VSYNC

PCLK

Y<7:0>

UV<7:0>

HREF

639 640

Even Field 1(FODD=0)

Odd Field(FODD=1)

Horizontal Timing

VSYNC

Y<7:0>/

UV<7:0>

Valid Data

1 Line

Tvs

Tve

Tline

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