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TMS28F210 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS28F210 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 25 page ![]() TMS28F210 65536 BY 16-BIT FLASH MEMORY SMJS210D – DECEMBER 1992 – REVISED AUGUST 1997 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 operation Modes of operation are defined in Table 1. Table 1. Operation Modes†‡ FUNCTION MODE DBW VPP§ E G A0 A9 W DQ0 – DQ15 MODE DBW PACKAGE 11 12 30 31 1 9 13 – 20, 22 – 29 FN PACKAGE 2 3 22 24 35 43 4 – 11, 14 – 21 Read VPPL VIL VIL X X VIH Data Out Output Disable VPPL VIL VIH X X VIH Hi-Z Read Standby and Write Inhibit VPPL VIH X X X X Hi-Z Algorithm Selection Mode VPPL VIL VIL VIL VID VIH Mfr. Equivalent Code 0097h Algorithm-Selection Mode VPPL VIL VIL VIH VID VIH Device Equivalent Code 00E5h Read VPPH VIL VIL X X VIH Data Out Read/ Output Disable VPPH VIL VIH X X VIH Hi-Z Write Standby and Write Inhibit VPPH VIH X X X X Hi-Z Write VPPH VIL VIH X X VIL Data In † See the recommended operating conditions table. ‡ X can be VIL or VIH. § VPPL ≤ VCC + 2 V; VPPH is the programming voltage specified for the device. read/output disable When the outputs of two or more TMS28F210s are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from the competing outputs of other devices. To read the output of the TMS28F210, a low-level signal is applied to the E and G pins. All other devices in the circuit should have their outputs disabled by applying a high-level signal to one of these pins. standby and write inhibit Active ICC current can be reduced from 50 mA to 1 mA by applying a high TTL level on E or reduced to 100 µA with a high CMOS level on E. In this mode, all outputs are in the high-impedance state. The TMS28F210 draws active current when it is deselected during programming, erasure, or program/erase verification. It continues to draw active current until the operation is terminated. algorithm-selection mode The algorithm-selection mode provides access to a binary code that identifies the correct programming and erase algorithms. This mode is activated when A9 is forced to VID. Two identifier bytes are accessed by toggling A0. All other addresses must be held low. A0 low selects the manufacturer-equivalent code 0097h, and A0 high selects the device-equivalent code 00E5h, as shown in Table 2. Table 2. Algorithm-Selection Modes¶ IDENTIFIER PINS# IDENTIFIER A0 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 HEX Manufacturer-Equivalent Code VIL 1 0 0 1 0 1 1 1 0097 Device-Equivalent Code VIH 1 1 1 0 0 1 0 1 00E5 ¶ E = G = A1 – A8 = A10 – A15 = VIL, A9 = VID, VPP = VPPL # D8 – D15 are not shown in the table because the upper eight data bits read 0. |
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