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TMS28F210 Datasheet(PDF) 16 Page - Texas Instruments |
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TMS28F210 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 25 page ![]() TMS28F210 65536 BY 16-BIT FLASH MEMORY SMJS210D – DECEMBER 1992 – REVISED AUGUST 1997 16 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETERS TEST ALTERNATE ’28F210-10 ’28F210-12 ’28F210-15 ’28F210-17 UNIT PARAMETERS CONDITIONS SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX UNIT ta(A) Access time from address tAVQV 100 120 150 170 ns ta(E) Access time from E tELQV 100 120 150 170 ns ten(G) Access time from G tGLQV 45 50 55 60 ns tc(R) Cycle time, read tAVAV 100 120 150 170 ns td(E) Delay time, chip enable low to low-Z output CL = 100 pF, tELQX 0 0 0 0 ns td(G) Delay time, G low to low-Z output L 1 Series 74 TTL load, Input tr ≤ 20 ns, Input tf ≤ 20 ns tGLQX 0 0 0 0 ns tdis(E) Chip disable to hi-Z output Input tf ≤ 20 ns tEHQZ 0 55 0 55 0 55 0 55 ns tdis(G) Disable time, output enable to hi-Z output tGHQZ 0 30 0 30 0 35 0 35 ns th(D) Hold time, data valid from address, E, or G† tAXQX 0 0 0 0 ns trec(W) Write recovery time before read tWHGL 6 6 6 6 µs † Whichever occurs first |
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